Aditya Swarup a6c8ddb596 intel/isl: Linear to Tile-4 conversion unittest ...

Add unittest to test conversion of data from linear to
Tile-4 format based on bit swizzling conversion info
mentioned in Bspec.

Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13391>

2023-09-02 21:49:05 -07:00

..

blorp

blorp: drop undefined macro

2023-09-03 03:04:26 +00:00

ci

ci: Disable WHL jobs

2023-09-02 15:43:01 -04:00

common

intel/aux_map: correctly program tiling mode for Ys

2023-09-01 23:22:18 +00:00

compiler

intel: Allow using intel_clc from the system

2023-09-01 21:36:02 +00:00

dev

intel: Add env variable to add break point on/before draw

2023-08-08 17:36:19 +00:00

ds

intel/compiler,intel/blorp,intel/vulkan: decouple vulkan driver and compiler from gallium

2023-08-03 22:00:15 +00:00

genxml

genxml/gfx12: rename Tiled Resource Mode

2023-09-01 23:22:17 +00:00

isl

intel/isl: Linear to Tile-4 conversion unittest

2023-09-02 21:49:05 -07:00

nullhw-layer

vulkan/layers: Use PUBLIC instead of VK_LAYER_EXPORT

2023-02-17 03:42:34 +00:00

perf

intel: Move i915_drm.h specific code from common/intel_gem.h to common/i915/intel_gem.h

2023-07-28 15:36:52 +00:00

tools

intel/compiler,intel/blorp,intel/vulkan: decouple vulkan driver and compiler from gallium

2023-08-03 22:00:15 +00:00

vulkan

anv: use the lineage number for WA

2023-09-03 03:04:26 +00:00

vulkan_hasvk

treewide: Use nir_before/after_impl for more elaborate cases

2023-08-30 19:30:58 +00:00

meson.build

intel: Only build perf if drivers or tools are enabled

2023-08-31 21:53:19 +00:00