Lionel Landwerlin 51893699a2 brw: stop emitting flush operations for begin/end interlock ...

NIR barrier intrinsics are already added for required flushing.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38242>

2025-11-06 09:33:25 +02:00

..

blorp

intel: use util_is_aligned more

2025-10-31 15:03:58 +00:00

ci

nir/algebraic: ad-hoc constant-fold ALU instructions

2025-10-30 19:28:07 +00:00

common

intel: Drop intel_mem.c/h

2025-10-16 01:19:45 +00:00

compiler

brw: stop emitting flush operations for begin/end interlock

2025-11-06 09:33:25 +02:00

decoder

treewide: use UTIL_DYNARRAY_INIT

2025-11-04 13:39:48 +00:00

dev

intel/dev: update mesa_defs.json from internal database

2025-11-04 05:17:30 +00:00

ds

anv: avoid invalid timestamp generation due to skipped commands

2025-11-05 22:27:06 +00:00

executor

intel/executor: Add a matrix multiplication example

2025-10-11 01:02:45 +00:00

genxml

intel/genxml: add registers handling autostrip for gfx200

2025-11-04 05:17:30 +00:00

isl

intel: use util_is_aligned more

2025-10-31 15:03:58 +00:00

mda

intel/mda: Use a vector to track the contents variable

2025-10-30 20:03:24 +00:00

nullhw-layer

build: avoid redefining unreachable() which is standard in C23

2025-07-31 17:49:42 +00:00

perf

intel/perf: Update perf scripts to get additional performance counters

2025-10-23 16:59:09 +00:00

shaders

intel: use common CL args

2025-03-06 00:43:59 +00:00

tools

intel/tools: add cmdbuf/queue annotation parsing

2025-10-23 15:31:10 +00:00

vulkan

anv/android: query and use explicit layout for ahb resolve

2025-11-05 22:51:44 +00:00

vulkan_hasvk

treewide: use UTIL_DYNARRAY_INIT

2025-11-04 13:39:48 +00:00

meson.build

brw: Move into a new src/intel/compiler/brw subdirectory

2025-10-09 07:01:47 +00:00