Files
mesa/src/amd/vulkan
Samuel Pitoiset c472ad82e4 radv: fix GPU hangs when loading depth/stencil clear values on SI/CIK
HTILE is supported on these chips, not sure how I missed that.
This restores using PFP_SYNC_ME when LOAD_CONTEXT_REG is not used.

Fixes: f425d9ee74 ("radv: use LOAD_CONTEXT_REG when loading fast clear values")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-11-08 11:20:03 +01:00
..
2017-08-29 01:08:58 +03:00
2018-10-29 17:09:08 +01:00
2018-05-31 11:51:23 +02:00
2018-10-26 18:33:11 +01:00
2018-05-21 10:33:41 +02:00