Chad Versace 9ea48fc877 i965/sync: Replace 'intel' prefix with 'brw' ...

This is yet another patch for the great renaming begun long ago.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

2016-10-05 17:09:24 -07:00

..

amd

radeonsi/compute: Use the HSA abi for non-TGSI compute shaders v3

2016-09-16 23:07:10 +00:00

compiler

nir: Use the correct infos structure for copying atomic sources

2016-10-05 13:04:54 -07:00

egl

egl: Implement EGL_KHR_debug (v2)

2016-10-05 11:41:26 -04:00

gallium

nvc0: dump program binary when chipset has been forced

2016-10-05 21:15:44 +02:00

gbm

gbm: return appropriate error when queryImage() fails

2016-09-27 13:37:21 +01:00

getopt

Introduce .editorconfig

2016-08-31 17:06:54 -07:00

glx

direct-to-native-GL for GLX clients on Cygwin ("Windows-DRI")

2016-09-15 13:14:43 +01:00

gtest

Introduce .editorconfig

2016-08-31 17:06:54 -07:00

hgl

Introduce .editorconfig

2016-08-31 17:06:54 -07:00

intel

intel/blorp: Use documented RECTLIST vertex positions

2016-10-05 09:41:21 -07:00

loader

loader/dri3: Always use at least two back buffers

2016-09-06 13:04:48 +09:00

mapi

Revert "mapi: export all GLES 3.2 functions in libGLESv2.so"

2016-09-23 12:13:13 -07:00

mesa

i965/sync: Replace 'intel' prefix with 'brw'

2016-10-05 17:09:24 -07:00

util

util/slab: re-design to allow migration between pools (v3)

2016-10-05 15:40:40 +02:00

Makefile.am

glsl: Prepare standalone compiler to be able to use parameter lists

2016-09-27 11:11:15 +10:00

SConscript

scons: put the generated git_sha1.h file in top-level src/ directory

2016-06-17 10:33:00 -06:00