Nanley Chery 93dbfea720 anv: Disable CCS if image bound to wrong heap on Xe2+ ...

Avoids HIZ + CCS flushes and helps debug.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32120>

2025-07-21 18:36:31 +00:00

..

blorp

intel: Update all NIR_PASS_V to NIR_PASS

2025-07-14 19:25:52 +00:00

ci

iris/ci: Lower concurrency of iris-cml-traces

2025-07-14 08:15:25 +00:00

common

intel: Add INTEL_DEBUG=no-vrt

2025-07-13 21:11:02 +00:00

compiler

util: crib SWAP macro from freedreno

2025-07-21 11:42:18 +00:00

decoder

intel/genxml: rename body field

2025-07-16 01:01:11 +00:00

dev

intel: Add INTEL_DEBUG=no-vrt

2025-07-13 21:11:02 +00:00

ds

intel/ds: Fix formatting of stage index.

2025-05-08 01:21:25 +00:00

executor

intel/executor: Add missing dependency to fix intermittent build failures

2025-07-07 18:35:56 +00:00

genxml

genxml: fix 3DSTATE_TE definition on Gfx12.[05]

2025-07-16 01:01:11 +00:00

isl

isl: Set tiling requirements for video surfaces

2025-07-16 04:08:16 +00:00

nullhw-layer

meson: include VkLayer_INTEL_nullhw in the devenv

2025-06-20 21:51:17 +00:00

perf

intel: fix monitor build dependencies

2025-06-22 10:55:21 +00:00

shaders

intel: use common CL args

2025-03-06 00:43:59 +00:00

tools

intel: fix monitor build dependencies

2025-06-22 10:55:21 +00:00

vulkan

anv: Disable CCS if image bound to wrong heap on Xe2+

2025-07-21 18:36:31 +00:00

vulkan_hasvk

anv: Remove NIR_PASS_V usage

2025-07-14 19:25:52 +00:00

meson.build

intel: Add meson option -Dintel-elk

2025-01-30 00:45:59 +00:00