Lionel Landwerlin 8fc42d83be anv: make sure pools can handle more than 2Gb ...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25955>

2023-10-30 14:47:18 +00:00

..

blorp

blorp: handle binding table & surface state allocation failures

2023-10-30 14:47:18 +00:00

ci

anv: uninitialize queues before utrace

2023-10-19 09:45:36 +00:00

common

intel/xehp+: Import algorithm for TBIMR tiling parameter calculation.

2023-10-27 14:48:29 -07:00

compiler

intel/fs: Xe2 fix for ExBSO on UGM

2023-10-27 10:58:12 +03:00

dev

intel/dev: fix intel_device_info_is_adln check

2023-10-30 11:20:41 +00:00

ds

intel/ds: provide names for different events of a timeline's row

2023-10-17 11:19:13 +00:00

genxml

intel/xehp+: Adjust TBIMR batch size based on slice count.

2023-10-27 14:50:42 -07:00

isl

docs/isl: use hawkmoth instead of doxygen

2023-10-26 16:13:26 +00:00

nullhw-layer

meson: support installation tags

2023-09-11 13:00:45 +00:00

perf

intel: Move i915_drm.h specific code from common/intel_gem.h to common/i915/intel_gem.h

2023-07-28 15:36:52 +00:00

tools

intel/common: Move intel_clflush.h to intel_mem.h/intel_mem.c

2023-09-06 01:39:53 +00:00

vulkan

anv: make sure pools can handle more than 2Gb

2023-10-30 14:47:18 +00:00

vulkan_hasvk

anv: deal with state stream allocation failures

2023-10-30 14:47:18 +00:00

meson.build

intel: Only build perf if drivers or tools are enabled

2023-08-31 21:53:19 +00:00