Danylo Piliaiev 1c9ee30838 nir/fold_16bit_tex_image: Add type granularity for dst folding ...

Some HW may be able to fold only some of dst types, e.g.
for Adreno folding i32 -> i16 could cause a different result since
folded variant clamps the result instead of masking it.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20396>

2022-12-23 15:48:18 +01:00

..

addrlib

meson: Enable initialized-but-unused warning for MSVC

2022-11-17 21:20:38 +00:00

ci

radv/ci/vkcts: do not sync back the *.qpa

2022-12-22 14:54:43 +00:00

common

ac: Add has_taskmesh_indirect0_bug field to ac_gpu_info struct.

2022-12-21 17:40:28 +01:00

compiler

aco/gfx11: implement load_input_vertex

2022-12-16 17:45:34 +00:00

drm-shim

r300: use drm_shim_override

2022-11-16 14:37:47 +00:00

llvm

ac/llvm: remove deref image/texture code

2022-12-19 09:22:45 +08:00

registers

amd/registers: regenerate gfx11 headers from amd-staging-drm-next

2022-11-04 00:42:08 +00:00

vulkan

nir/fold_16bit_tex_image: Add type granularity for dst folding

2022-12-23 15:48:18 +01:00

.clang-format

radv: Add nir_foreach_variable_with_modes to .clang-format

2022-12-09 07:07:10 +00:00

meson.build

meson: build radeon drm-shim also for r300 and r600

2022-11-16 14:37:47 +00:00