Rohan Garg 8a33a1390a anv: limit non zero fast clear check to GFX12_CCS_E ...

TGL C0 and above can fast clear to non zero values

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22076>

2023-05-29 16:48:47 +00:00

..

blorp

nir: use more nir_fadd_imm

2023-05-25 06:59:24 +00:00

ci

ci: bump from Debian 11 (bullseye) to 12 (bookworm)

2023-05-25 16:06:51 +02:00

common

intel: add alignment helper for aux map

2023-05-26 12:58:13 +00:00

compiler

nir: use more nir_fmul_imm

2023-05-25 06:59:24 +00:00

dev

intel: reduce minimum memory alignment on Gfx12.5

2023-05-26 12:58:13 +00:00

ds

meson: remove needless c++17-overrides

2023-05-19 12:45:31 +00:00

genxml

intel/genxml: add a command VD_CONTROL_STATE to gen12/125

2023-05-19 06:15:01 +00:00

isl

isl: add helper to check if aux usage is CCS_E

2023-05-29 16:48:47 +00:00

nullhw-layer

vulkan/layers: Use PUBLIC instead of VK_LAYER_EXPORT

2023-02-17 03:42:34 +00:00

perf

intel/perf: fix OA format selection on MTL

2023-04-03 23:34:17 +00:00

tools

intel/tools: decode ACTHD printed by newer kernels

2023-05-05 14:55:41 +00:00

vulkan

anv: limit non zero fast clear check to GFX12_CCS_E

2023-05-29 16:48:47 +00:00

vulkan_hasvk

nir: Drop unused name from nir_ssa_dest_init

2023-05-17 23:46:16 +00:00

meson.build

blorp: add dependency on idep_intel_dev

2023-03-03 13:04:23 +00:00