Logo
Explore Help
Register Sign In
AlexIndustrial/mesa
1
0
Fork 0
You've already forked mesa
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
853f8eb9300f03e341c97d4938e3f1237b0ea4e9
mesa/src/amd
T
History
Samuel Pitoiset 853f8eb930 radv: remove redundant zero initialization of pipeline layout
It's already zeroed in radv_pipeline_layout_init().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21048>
2023-02-01 23:25:52 +00:00
..
addrlib
meson: Enable initialized-but-unused warning for MSVC
2022-11-17 21:20:38 +00:00
ci
util/format: Fix wrong colors when importing YUYV and UYVY
2023-02-01 03:24:23 +00:00
common
ac/gpu_info: add PCIe info
2023-02-01 14:58:57 +00:00
compiler
aco: limit VALUPartialForwardingHazard search
2023-02-01 18:52:40 +00:00
drm-shim
r300: use drm_shim_override
2022-11-16 14:37:47 +00:00
llvm
ac/llvm: remove llvm:: now that we use "using namespace llvm"
2023-01-26 19:33:55 -05:00
registers
amd/registers: regenerate gfx11 headers from amd-staging-drm-next
2022-11-04 00:42:08 +00:00
vulkan
radv: remove redundant zero initialization of pipeline layout
2023-02-01 23:25:52 +00:00
.clang-format
radv: Add nir_foreach_variable_with_modes to .clang-format
2022-12-09 07:07:10 +00:00
meson.build
meson: build radeon drm-shim also for r300 and r600
2022-11-16 14:37:47 +00:00
Powered by Gitea Version: 1.26.0 Page: 91ms Template: 3ms
catppuccin-mocha-sky
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API