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Danylo Piliaiev dff8a0c4cb isaspec: inherite parent's bitset gpu gen requirements 
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
2021-10-21 18:59:57 +00:00
..
clc
compiler/clc: Preserve OCL kernel arg type metadata on LLVM13
2021-10-04 18:16:01 +00:00
glsl
compiler/types: Add a wrap_in_arrays helper
2021-10-16 05:49:34 +00:00
isaspec
isaspec: inherite parent's bitset gpu gen requirements
2021-10-21 18:59:57 +00:00
nir
nir/lower_amul: do not lower 64bit amul to imul24
2021-10-21 18:59:57 +00:00
spirv
spirv: Don't add 0.5 to array indicies for OpImageSampleExplicitLod
2021-10-18 12:21:52 +10:00
builtin_type_macros.h
compiler/types: Add a texture type
2021-10-16 05:49:34 +00:00
glsl_types.cpp
compiler/types: Add a texture type
2021-10-16 05:49:34 +00:00
glsl_types.h
compiler/types: Add a texture type
2021-10-16 05:49:34 +00:00
meson.build
spirv: Use a single binary for gtests
2021-10-20 17:55:36 +00:00
nir_types.cpp
compiler/types: Add a wrap_in_arrays helper
2021-10-16 05:49:34 +00:00
nir_types.h
compiler/types: Add a wrap_in_arrays helper
2021-10-16 05:49:34 +00:00
shader_enums.c
compiler: Add new non-Multiview Task/Mesh builtins
2021-08-28 03:56:42 +00:00
shader_enums.h
compiler: Add new non-Multiview Task/Mesh builtins
2021-08-28 03:56:42 +00:00
shader_info.h
spirv: switch Groups capability to non AMD specific field
2021-09-29 15:40:20 +00:00