Marcin Ślusarz 7ebae85955 intel/compiler: insert URB fence before task/mesh termination ...

Bspec 53421 says:
"A URB fence memory is typically performed prior the thread
exit message, so that the next thread dispatch that reads
that URB memory will see it."

Cc: 22.1 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16665>

2022-08-02 09:31:24 +00:00

..

blorp

intel/blorp: Set uses_sample_shading for MSAA blit shaders

2022-07-13 20:28:42 +00:00

ci

intel/fs: Use nir_lower_single_sampled

2022-07-13 20:28:42 +00:00

common

intel: protect against empty invalidate ranges

2022-07-13 01:33:27 +00:00

compiler

intel/compiler: insert URB fence before task/mesh termination

2022-08-02 09:31:24 +00:00

dev

intel/dev: drop warning for unhandled hwconfig keys

2022-08-02 08:08:02 +00:00

ds

u_trace/anv/iris: drop cs argument for recording traces

2022-05-19 19:04:28 +00:00

genxml

intel: fix typos found by codespell

2022-06-27 10:20:55 +00:00

isl

isl: add new helper for format component compatibility

2022-07-11 14:57:26 +00:00

nullhw-layer

intel/nullhw: Use correct macro to fix build regression

2022-08-01 10:54:38 +00:00

perf

intel: fix typos found by codespell

2022-06-27 10:20:55 +00:00

tools

intel/compiler: Introduce a new brw_isa_info structure

2022-06-30 23:46:35 +00:00

vulkan

anv: enable VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM for modifier support

2022-07-29 23:24:15 +00:00

meson.build

anv: add perfetto source

2022-01-14 20:17:44 +00:00