Samuel Pitoiset 431a3cf239 radv/winsys: add null winsys entries for Sienna Cichild/Navy Flounder ...

We don't know the PCI ID yet.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6257>

2020-08-12 09:45:57 +00:00

..

addrlib

amd: add support for Navy Flounder

2020-07-28 19:47:10 +00:00

common

ac/gpu_info: set num_tiles_pipes on gfx10+ too

2020-08-07 11:22:21 -04:00

compiler

aco: execute branch instructions in WQM if necessary

2020-08-11 15:35:59 +00:00

llvm

amd/llvm: Reorder LLVM headers

2020-08-05 17:15:18 +00:00

registers

ac: add tables for CP register shadowing

2020-07-22 12:08:19 -04:00

vulkan

radv/winsys: add null winsys entries for Sienna Cichild/Navy Flounder

2020-08-12 09:45:57 +00:00

Android.addrlib.mk

android: amd/addrlib: add gfx10 support

2019-07-10 09:03:55 +02:00

Android.common.mk

radeonsi: Define gfx10_format in the common header.

2020-06-03 00:17:00 +00:00

Android.compiler.mk

android: aco: fix PIPE_FORMAT related building errors

2020-03-04 22:25:36 +01:00

Android.mk

android: aco: add support for libmesa_aco

2019-09-28 15:56:34 +02:00

Makefile.sources

ac: add tables for CP register shadowing

2020-07-22 12:08:19 -04:00

meson.build

aco: add framework for unit testing

2020-07-30 16:13:08 +00:00