Samuel Pitoiset 7270bf7aa3 radv: specialize index buffer DGC token ...

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30852>

2024-08-28 11:03:36 +00:00

..

addrlib

amd: update addrlib

2024-08-16 21:44:32 +00:00

ci

radv/ci: enable RADV_PERFTEST=transfer_queue on GFX9+

2024-08-26 09:26:52 +00:00

common

ac,radeonsi,radv: add common GFX preambles

2024-08-27 14:14:57 +00:00

compiler

aco/tests: do not use mul with constant to tests neg modifier

2024-08-27 20:41:10 +00:00

drm-shim

amd/drm-shim: add GFX1150 support

2024-08-13 13:17:17 +00:00

llvm

ac/llvm: build wqm for quad intrinsics only when fragment shader

2024-08-26 10:46:11 +08:00

registers

amd: add gfx12 register definitions

2024-05-11 22:14:05 -04:00

vpelib

amd/vpelib: Add 420 semi-planar 12bit handling

2024-08-26 19:57:15 +00:00

vulkan

radv: specialize index buffer DGC token

2024-08-28 11:03:36 +00:00

meson.build

build: pass licensing information in SPDX form

2024-06-29 12:42:49 -07:00