José Roberto de Souza eb9ab4efeb intel/genxml/gen125: Tune 3DSTATE_WM Walker direction ...

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21105>

2023-02-07 07:34:44 -08:00

..

blorp

intel/compiler: Convert wm_prog_key::multisample_fbo to a tri-state

2023-02-06 09:12:18 +00:00

ci

anv: expose EXT_load_store_op_none

2023-02-01 12:53:29 +00:00

common

intel/fs: Make per-sample and coarse dispatch tri-state

2023-02-06 09:12:18 +00:00

compiler

anv: use shader_info->var_copies_lowered

2023-02-06 22:11:34 +00:00

dev

intel/dev: remove invalid EHL pci id

2023-02-06 16:48:39 +00:00

ds

intel/ds: track end of pipe bits

2023-02-06 09:12:18 +00:00

genxml

intel/genxml/gen125: Tune 3DSTATE_WM Walker direction

2023-02-07 07:34:44 -08:00

isl

intel/isl: Disable CCS on MTL until B0 (Wa_14017353530)

2022-12-15 11:43:00 -08:00

nullhw-layer

utils: Merge util/debug.* into util/u_debug.* and remove util/debug.*

2022-11-02 07:25:39 +00:00

perf

intel: add MTL performance metrics

2022-12-09 09:13:02 +00:00

tools

anv,hasvk: migrate align32 to the right functions from util

2023-01-06 17:22:16 +00:00

vulkan

anv: use malloc for host only descriptor sets

2023-02-07 07:28:32 +00:00

vulkan_hasvk

intel/fs: make alpha_to_coverage a tristate

2023-02-06 09:12:18 +00:00

meson.build

intel: Disable SSE2 instruction set if building for non x86 architectures

2022-11-23 16:57:23 +00:00