Sagar Ghuge b223d33141 blorp: Handle stencil buffer compression on blitter engine ...

XY_BLOCK_COPY_BLT and XY_FAST_COLOR_BLT instruction supports AUX_CCS
surface mode. Stencil buffer compression is stencil data with CCS so we
can easily support that on blitter engine.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26167>

2023-12-06 04:39:09 +00:00

..

blorp

blorp: Handle stencil buffer compression on blitter engine

2023-12-06 04:39:09 +00:00

ci

intel/ci: fix .hasvk-manual-rules

2023-11-27 12:55:18 +00:00

common

intel/tools: hang viewer/editor

2023-12-04 14:51:29 +00:00

compiler

intel/vec4: Use MESA_PRIM_* instead of GL_*

2023-12-05 23:12:32 +00:00

dev

intel/dev: Add a bit for when the HW can do a indirect draw/dispatch unroll

2023-11-30 17:01:44 +00:00

ds

intel/ds: add trace of buffer markers

2023-11-29 01:16:22 +00:00

genxml

intel/genxml: Update 3DSTATE_TE for xe2

2023-12-02 02:22:07 +00:00

isl

isl: disable MCS compression on R9G9B9E5

2023-11-09 20:20:43 +00:00

nullhw-layer

meson: support installation tags

2023-09-11 13:00:45 +00:00

perf

intel/perf: fix regex escaping

2023-11-27 11:58:03 +00:00

tools

intel/tools: 32bit compile fixes

2023-12-05 17:45:18 +00:00

vulkan

anv/sparse: document USAGE_2D_3D_COMPATIBLE as non-standard too

2023-12-06 00:29:58 +00:00

vulkan_hasvk

hasvk: update symbols that have become aliases for newer ones

2023-12-04 18:06:57 +00:00

meson.build

intel: Only build perf if drivers or tools are enabled

2023-08-31 21:53:19 +00:00