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5f4eacaeda58e358072f0000403410b825803c13
mesa/src/intel/compiler
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Matt Turner 5f4eacaeda intel/compiler: Validate some instruction word encodings 
Specifically, execution size, register file, and register type. I did
not add validation for vertical stride and width because I don't believe
it's possible to have an otherwise valid instruction with an invalid
vertical stride or width, due to all of the other regioning
restrictions.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
2020-01-22 00:19:21 +00:00
..
brw_cfg.cpp
intel/ir: Represent physical edge of unconditional CONTINUE instruction.
2019-10-11 12:24:16 -07:00
brw_cfg.h
intel/ir: Represent physical and logical subsets of the CFG.
2019-10-11 12:24:16 -07:00
brw_clip_line.c
i965: Move clip program compilation to the compiler
2017-05-26 07:58:01 -07:00
brw_clip_point.c
i965: Move clip program compilation to the compiler
2017-05-26 07:58:01 -07:00
brw_clip_tri.c
i965: Don't emit MOVs with undefined registers for Gen4 point clipping.
2018-02-28 15:03:51 -08:00
brw_clip_unfilled.c
i965: Move clip program compilation to the compiler
2017-05-26 07:58:01 -07:00
brw_clip_util.c
i965: Move clip program compilation to the compiler
2017-05-26 07:58:01 -07:00
brw_clip.h
i965: Move clip program compilation to the compiler
2017-05-26 07:58:01 -07:00
brw_compile_clip.c
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_compile_sf.c
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_compiler.c
intel/compiler: Split has_64bit_types into float/int
2020-01-22 00:19:20 +00:00
brw_compiler.h
intel/fs/gen6: Generalize aligned_pairs_class to SIMD16 aligned barycentrics.
2020-01-17 13:22:34 -08:00
brw_dead_control_flow.cpp
…
brw_dead_control_flow.h
intel/compiler: consistently use ifndef guards over pragma once
2017-03-22 16:55:22 +00:00
brw_debug_recompile.c
intel/compiler: Add a "base class" for program keys
2019-07-10 19:35:55 +00:00
brw_disasm_info.c
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_disasm_info.h
i965: Stop including brw_cfg.h in brw_disasm_info.h
2017-11-17 21:51:16 -08:00
brw_disasm.c
intel/compiler: Don't disassemble align1 3-src operands on Gen < 10
2020-01-22 00:19:20 +00:00
brw_eu_compact.c
intel/compiler: Handle invalid compacted immediates
2020-01-22 00:19:21 +00:00
brw_eu_defines.h
intel/fs: Add FS_OPCODE_SCHEDULING_FENCE
2020-01-21 23:41:35 +00:00
brw_eu_emit.c
intel/compiler: Don't change hstride if not needed
2019-11-18 14:19:41 -08:00
brw_eu_util.c
intel/compiler: whitespace cleanups
2017-03-13 11:16:35 +00:00
brw_eu_validate.c
intel/compiler: Validate some instruction word encodings
2020-01-22 00:19:21 +00:00
brw_eu.cpp
intel/compiler: Extract GEN_* macros into separate file
2020-01-22 00:19:20 +00:00
brw_eu.h
intel/fs: Add DWord scattered read/write opcodes
2019-11-11 17:17:02 +00:00
brw_fs_bank_conflicts.cpp
intel/fs/gen6: Constrain barycentric source of LINTERP during bank conflict mitigation.
2020-01-17 13:22:29 -08:00
brw_fs_builder.h
intel/compiler: remove the operand restriction for src1 on GLK
2019-11-05 00:08:34 +00:00
brw_fs_cmod_propagation.cpp
intel/fs: Allow cmod propagation across reads and writes of different flags
2019-06-05 17:03:45 -07:00
brw_fs_combine_constants.cpp
intel/compiler: Don't move immediate in register
2019-10-21 20:32:43 -07:00
brw_fs_copy_propagation.cpp
intel/fs: Allow limited copy propagation of a LOAD_PAYLOAD into another.
2020-01-17 13:22:09 -08:00
brw_fs_cse.cpp
intel/fs: Rework fs_inst::is_copy_payload() into multiple classification helpers.
2020-01-17 13:21:19 -08:00
brw_fs_dead_code_eliminate.cpp
intel/fs: Properly stride NULL replacement regs in DCE
2019-07-17 18:44:35 +00:00
brw_fs_generator.cpp
intel/compiler: Split has_64bit_types into float/int
2020-01-22 00:19:20 +00:00
brw_fs_live_variables.cpp
intel/compiler: Fix C++ one definition rule violations
2019-10-28 12:02:40 +02:00
brw_fs_live_variables.h
intel/compiler: Fix C++ one definition rule violations
2019-10-28 12:02:40 +02:00
brw_fs_lower_pack.cpp
…
brw_fs_lower_regioning.cpp
intel/fs: Add an UNDEF instruction to avoid excess live ranges
2019-06-04 14:27:30 -05:00
brw_fs_nir.cpp
intel/fs: Don't emit control barrier if only one thread is used
2020-01-21 23:41:35 +00:00
brw_fs_reg_allocate.cpp
intel/fs/gen6: Generalize aligned_pairs_class to SIMD16 aligned barycentrics.
2020-01-17 13:22:34 -08:00
brw_fs_register_coalesce.cpp
intel/fs: Rework fs_inst::is_copy_payload() into multiple classification helpers.
2020-01-17 13:21:19 -08:00
brw_fs_saturate_propagation.cpp
Revert "intel/compiler: split is_partial_write() into two variants"
2019-04-25 09:19:10 +02:00
brw_fs_scoreboard.cpp
intel/fs: Make implied_mrf_writes() an fs_inst method.
2020-01-10 11:02:30 -08:00
brw_fs_sel_peephole.cpp
Revert "intel/compiler: split is_partial_write() into two variants"
2019-04-25 09:19:10 +02:00
brw_fs_validate.cpp
intel: disable FS IR validation in release mode.
2018-10-15 18:10:27 -07:00
brw_fs_visitor.cpp
intel/fs: Switch to standard vector layout for barycentrics at optimization time.
2020-01-17 13:23:12 -08:00
brw_fs.cpp
intel/compiler: Split has_64bit_types into float/int
2020-01-22 00:19:20 +00:00
brw_fs.h
intel/fs: Add workgroup_size() helper
2020-01-21 23:41:35 +00:00
brw_gen_enum.h
intel/compiler: Extract GEN_* macros into separate file
2020-01-22 00:19:20 +00:00
brw_inst.h
intel/compiler: Add instruction compaction support on Gen12
2019-10-30 11:11:50 -07:00
brw_interpolation_map.c
intel/compiler: Silence unused parameter warning in brw_interpolation_map.c
2019-03-06 08:35:36 -08:00
brw_ir_allocator.h
intel/ir: Don't allow allocating zero registers
2018-12-11 21:26:23 -06:00
brw_ir_fs.h
intel/fs: Rework fs_inst::is_copy_payload() into multiple classification helpers.
2020-01-17 13:21:19 -08:00
brw_ir_vec4.h
intel: Don't propagate conditional modifiers if a UD source is negated
2018-10-10 13:13:12 -05:00
brw_nir_analyze_boolean_resolves.c
intel/fs: Mark source 0 of bcsel as needing Boolean resolve
2019-06-11 12:12:07 -07:00
brw_nir_analyze_ubo_ranges.c
nir: Add explicit signs to image min/max intrinsics
2019-08-21 17:19:55 +00:00
brw_nir_attribute_workarounds.c
nir/builder: Remove the use_fmov parameter from nir_swizzle
2019-05-24 08:38:11 -05:00
brw_nir_lower_alpha_to_coverage.c
nir: Add alpha_to_coverage lowering pass
2019-10-21 11:27:29 -07:00
brw_nir_lower_conversions.c
intel/compiler: add a NIR pass to lower conversions
2019-04-18 11:05:18 +02:00
brw_nir_lower_cs_intrinsics.c
intel/nir: Stop adding redundant barriers
2020-01-13 17:23:47 +00:00
brw_nir_lower_image_load_store.c
nir: move data.image.access to data.access
2019-11-19 18:20:05 -05:00
brw_nir_lower_mem_access_bit_sizes.c
intel/fs: Implement the new load/store_scratch intrinsics
2019-11-11 17:17:02 +00:00
brw_nir_opt_peephole_ffma.c
util: rename list_empty() to list_is_empty()
2019-10-28 11:24:38 +00:00
brw_nir_tcs_workarounds.c
util: use C99 declaration in the for-loop set_foreach() macro
2018-10-25 12:43:18 +01:00
brw_nir_trig_workarounds.py
intel/nir: do not apply the fsin and fcos trig workarounds for consts
2019-09-17 23:39:18 +03:00
brw_nir.c
anv,nir: Lower quad_broadcast with dynamic index in NIR
2020-01-15 08:34:57 -06:00
brw_nir.h
i965: Reuse the new core glsl_count_dword_slots().
2020-01-14 23:55:00 +00:00
brw_packed_float.c
intel/compiler: Cast to target type before shifting left
2019-10-24 16:19:23 +02:00
brw_predicated_break.cpp
intel/ir: Represent physical and logical subsets of the CFG.
2019-10-11 12:24:16 -07:00
brw_reg_type.c
intel/compiler: Handle invalid inputs to brw_reg_type_to_*()
2020-01-22 00:19:21 +00:00
brw_reg_type.h
intel/compiler: Add a INVALID_{,HW_}REG_TYPE macros
2020-01-22 00:19:20 +00:00
brw_reg.h
intel/compiler: Add NF some more places
2020-01-22 00:19:20 +00:00
brw_schedule_instructions.cpp
intel/fs: Make implied_mrf_writes() an fs_inst method.
2020-01-10 11:02:30 -08:00
brw_shader.cpp
intel/fs: Add FS_OPCODE_SCHEDULING_FENCE
2020-01-21 23:41:35 +00:00
brw_shader.h
intel/nir: Take a nir_tex_instr and src index in brw_texture_offset
2019-04-14 22:25:56 +02:00
brw_vec4_builder.h
intel/compiler: Lower flrp32 on Gen11+
2018-02-28 11:15:47 -08:00
brw_vec4_cmod_propagation.cpp
intel/compiler: use correct swizzle for replacement
2019-02-27 20:06:42 +00:00
brw_vec4_copy_propagation.cpp
intel/compiler: Re-prefix non-logical surface opcodes with VEC4
2019-02-28 16:58:20 -06:00
brw_vec4_cse.cpp
i965/vec4: Allow CSE on subset VF constant loads
2018-03-08 15:26:26 -08:00
brw_vec4_dead_code_eliminate.cpp
i965/vec4/dce: Don't narrow the write mask if the flags are used
2018-12-17 13:47:06 -08:00
brw_vec4_generator.cpp
intel/compiler: Report the number of non-spill/fill SEND messages on vec4 too
2019-10-30 21:27:03 -07:00
brw_vec4_gs_nir.cpp
intel/vec4: Drop all of the 64-bit varying code
2019-07-31 18:14:09 -05:00
brw_vec4_gs_visitor.cpp
intel/compiler: Fill a compiler statistics struct
2019-08-12 22:56:07 +00:00
brw_vec4_gs_visitor.h
i965/vec4: Delete the system value infastructure
2017-05-09 15:08:07 -07:00
brw_vec4_live_variables.cpp
intel/compiler: Fix C++ one definition rule violations
2019-10-28 12:02:40 +02:00
brw_vec4_live_variables.h
intel/compiler: Fix C++ one definition rule violations
2019-10-28 12:02:40 +02:00
brw_vec4_nir.cpp
intel/vec4: Support scoped_memory_barrier
2020-01-13 17:23:46 +00:00
brw_vec4_reg_allocate.cpp
intel/compiler: Prevent warnings in the following patch
2019-01-09 16:42:41 -08:00
brw_vec4_surface_builder.cpp
intel/compiler: Re-prefix non-logical surface opcodes with VEC4
2019-02-28 16:58:20 -06:00
brw_vec4_surface_builder.h
intel/vec4: Drop dead code for handling typed surface messages
2019-02-28 16:58:20 -06:00
brw_vec4_tcs.cpp
nir: Rename nir_intrinsic_barrier to control_barrier
2020-01-13 17:23:47 +00:00
brw_vec4_tcs.h
i965/vec4: Delete the system value infastructure
2017-05-09 15:08:07 -07:00
brw_vec4_tes.cpp
intel/vec4: Drop all of the 64-bit varying code
2019-07-31 18:14:09 -05:00
brw_vec4_tes.h
i965/vec4: Delete the system value infastructure
2017-05-09 15:08:07 -07:00
brw_vec4_visitor.cpp
intel/vec4: Delete vec4_visitor::emit_lrp
2019-07-08 11:30:11 -07:00
brw_vec4_vs_visitor.cpp
i965: Use NIR to lower legacy userclipping.
2019-07-24 18:00:13 +00:00
brw_vec4_vs.h
i965: Use NIR to lower legacy userclipping.
2019-07-24 18:00:13 +00:00
brw_vec4.cpp
intel/compiler: Add a flag to avoid compacting push constants
2019-11-18 18:35:14 +00:00
brw_vec4.h
intel/compiler: Fill a compiler statistics struct
2019-08-12 22:56:07 +00:00
brw_vue_map.c
intel/compiler: silence a warning of using different enum type
2019-06-25 10:09:22 +03:00
brw_wm_iz.cpp
intel: Use a system value for gl_FragCoord
2019-07-29 23:30:26 +00:00
gen6_gs_visitor.cpp
intel/compiler: Prevent warnings in the following patch
2019-01-09 16:42:41 -08:00
gen6_gs_visitor.h
…
meson.build
nir: Add alpha_to_coverage lowering pass
2019-10-21 11:27:29 -07:00
test_eu_compact.cpp
intel/compiler: Limit compaction unit tests to specific gens
2020-01-22 00:19:20 +00:00
test_eu_validate.cpp
intel/compiler: Split has_64bit_types into float/int
2020-01-22 00:19:20 +00:00
test_fs_cmod_propagation.cpp
intel/fs: Drop the gl_program from fs_visitor
2019-08-25 01:02:52 -05:00
test_fs_copy_propagation.cpp
intel/fs: Drop the gl_program from fs_visitor
2019-08-25 01:02:52 -05:00
test_fs_saturate_propagation.cpp
intel/fs: Drop the gl_program from fs_visitor
2019-08-25 01:02:52 -05:00
test_fs_scoreboard.cpp
intel/fs/gen12: Add tests for scoreboard pass
2019-10-17 10:02:35 -07:00
test_vec4_cmod_propagation.cpp
i965/vec4: Silence unused parameter warnings in vec4 compiler tests
2018-12-17 13:47:06 -08:00
test_vec4_copy_propagation.cpp
i965/vec4: Silence unused parameter warnings in vec4 compiler tests
2018-12-17 13:47:06 -08:00
test_vec4_dead_code_eliminate.cpp
i965/vec4/dce: Don't narrow the write mask if the flags are used
2018-12-17 13:47:06 -08:00
test_vec4_register_coalesce.cpp
i965/vec4: Silence unused parameter warnings in vec4 compiler tests
2018-12-17 13:47:06 -08:00
test_vf_float_conversions.cpp
…