Files
mesa/src/intel/vulkan
Lionel Landwerlin 5e21f47428 anv: fixup PIPE_CONTROL restriction on gfx8
We're missing a condition that is currently papered over by having
ANV_PIPE_HDC_PIPELINE_FLUSH_BIT in the invalidate bits.

v2: rework with simplication (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16905>
2022-08-05 10:42:16 +03:00
..
2021-12-17 00:55:31 +00:00
2022-08-03 23:57:50 +00:00
2022-04-22 21:59:50 +00:00
2022-06-10 01:33:12 +00:00