Samuel Pitoiset
5cb400a97b
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37956>
124 lines
3.6 KiB
C
124 lines
3.6 KiB
C
/*
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* Copyright 2012 Advanced Micro Devices, Inc.
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*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef AC_CMDBUF_CP_H
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#define AC_CMDBUF_CP_H
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#include <inttypes.h>
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#include <stdbool.h>
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#include "amd_family.h"
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#include "util/macros.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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struct ac_cmdbuf;
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struct radeon_info;
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enum ac_cp_indirect_buffer_flags {
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AC_CP_INDIRECT_BUFFER_CHAIN = 1u << 0,
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AC_CP_INDIRECT_BUFFER_VALID = 1u << 1,
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};
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void
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ac_emit_cp_indirect_buffer(struct ac_cmdbuf *cs, uint64_t va, uint32_t cdw,
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enum ac_cp_indirect_buffer_flags flags,
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bool predicate);
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void
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ac_emit_cp_cond_exec(struct ac_cmdbuf *cs, enum amd_gfx_level gfx_level,
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uint64_t va, uint32_t count);
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void
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ac_emit_cp_write_data_head(struct ac_cmdbuf *cs, uint32_t engine_sel,
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uint32_t dst_sel, uint64_t va, uint32_t size,
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bool predicate);
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void
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ac_emit_cp_write_data(struct ac_cmdbuf *cs, uint32_t engine_sel,
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uint32_t dst_sel, uint64_t va, uint32_t size,
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const uint32_t *data, bool predicate);
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void
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ac_emit_cp_write_data_imm(struct ac_cmdbuf *cs, unsigned engine_sel,
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uint64_t va, uint32_t value);
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void
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ac_emit_cp_wait_mem(struct ac_cmdbuf *cs, uint64_t va, uint32_t ref,
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uint32_t mask, unsigned flags);
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void
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ac_emit_cp_acquire_mem_pws(struct ac_cmdbuf *cs, ASSERTED enum amd_gfx_level gfx_level,
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ASSERTED enum amd_ip_type ip_type, uint32_t event_type,
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uint32_t stage_sel, uint32_t count,
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uint32_t gcr_cntl);
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void
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ac_emit_cp_release_mem_pws(struct ac_cmdbuf *cs, ASSERTED enum amd_gfx_level gfx_level,
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ASSERTED enum amd_ip_type ip_type, uint32_t event_type,
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uint32_t gcr_cntl);
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enum ac_cp_copy_data_flags {
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AC_CP_COPY_DATA_WR_CONFIRM = 1u << 0,
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AC_CP_COPY_DATA_COUNT_SEL = 1u << 1, /* 64 bits */
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AC_CP_COPY_DATA_ENGINE_PFP = 1u << 2,
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};
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void
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ac_emit_cp_copy_data(struct ac_cmdbuf *cs, uint32_t src_sel, uint32_t dst_sel,
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uint64_t src_va, uint64_t dst_va,
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enum ac_cp_copy_data_flags flags, bool predicate);
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void
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ac_emit_cp_pfp_sync_me(struct ac_cmdbuf *cs, bool predicate);
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void
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ac_emit_cp_set_predication(struct ac_cmdbuf *cs, enum amd_gfx_level gfx_level,
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uint64_t va, uint32_t op);
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void
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ac_emit_cp_gfx11_ge_rings(struct ac_cmdbuf *cs, const struct radeon_info *info,
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uint64_t attr_ring_va, bool enable_gfx12_partial_hiz_wa);
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void
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ac_emit_cp_tess_rings(struct ac_cmdbuf *cs, const struct radeon_info *info,
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uint64_t va);
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void
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ac_emit_cp_gfx_scratch(struct ac_cmdbuf *cs, enum amd_gfx_level gfx_level,
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uint64_t va, uint32_t size);
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void
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ac_emit_cp_acquire_mem(struct ac_cmdbuf *cs, enum amd_gfx_level gfx_level,
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enum amd_ip_type ip_type, uint32_t engine,
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uint32_t gcr_cntl);
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void
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ac_emit_cp_atomic_mem(struct ac_cmdbuf *cs, uint32_t atomic_op,
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uint32_t atomic_cmd, uint64_t va, uint64_t data,
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uint64_t compare_data);
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void
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ac_emit_cp_nop(struct ac_cmdbuf *cs, uint32_t value);
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void
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ac_emit_cp_load_context_reg_index(struct ac_cmdbuf *cs, uint32_t reg,
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uint32_t reg_count, uint64_t va,
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bool predicate);
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void
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ac_emit_cp_inhibit_clockgating(struct ac_cmdbuf *cs, enum amd_gfx_level gfx_level,
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bool inhibit);
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#ifdef __cplusplus
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}
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#endif
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#endif
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