Files
mesa/src/intel
Tapani Pälli 97f2b60833 anv: implement Wa_14015814527 for task shaders
After using task shader, we need to emit a zero URB state and a
nullprim (empty pipe control) before rendering with primitives.

After this, a normal URB state needs to be returned, this will
happen when pipeline batch is emitted during pipeline switch.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20334>
2023-01-03 12:44:08 +00:00
..
2022-12-28 23:08:37 +00:00
2022-12-09 09:13:02 +00:00