Väinö Mäkelä 56667002fd intel/vec4: Don't optimize multiply by 1.0 away ...

The SPIR-V compiler's implementation of tanh generates a multiply by 1.0
to flush denorms to zero.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20232>

2023-02-10 16:34:01 +00:00

..

blorp

intel/blorp: disable REP16 for gfx12+ with R10G10B10_FLOAT_A2

2023-02-09 06:34:43 +00:00

ci

anv: expose EXT_load_store_op_none

2023-02-01 12:53:29 +00:00

common

anv: add video engine support in various places

2023-02-08 02:56:28 +00:00

compiler

intel/vec4: Don't optimize multiply by 1.0 away

2023-02-10 16:34:01 +00:00

dev

anv: Start to move anv_gem_stubs.c to kmd backend

2023-02-09 02:57:32 +00:00

ds

intel/ds: track end of pipe bits

2023-02-06 09:12:18 +00:00

genxml

intel/genxml: add missing power well control bits

2023-02-08 02:56:28 +00:00

isl

intel/isl: Disable CCS on MTL until B0 (Wa_14017353530)

2022-12-15 11:43:00 -08:00

nullhw-layer

utils: Merge util/debug.* into util/u_debug.* and remove util/debug.*

2022-11-02 07:25:39 +00:00

perf

intel: add MTL performance metrics

2022-12-09 09:13:02 +00:00

tools

anv,hasvk: migrate align32 to the right functions from util

2023-01-06 17:22:16 +00:00

vulkan

vulkan: Use static_assert for check HWVULKAN_DISPATCH_MAGIC == ICD_LOADER_MAGIC

2023-02-10 07:21:31 +00:00

vulkan_hasvk

vulkan: Use static_assert for check HWVULKAN_DISPATCH_MAGIC == ICD_LOADER_MAGIC

2023-02-10 07:21:31 +00:00

meson.build

intel: Disable SSE2 instruction set if building for non x86 architectures

2022-11-23 16:57:23 +00:00