Files
mesa/src/intel/vulkan
Anuj Phogat 545d852a7a intel/gen9: Enable MSC RAW Hazard Avoidance
Workaround # 22011374674
Applied to i965, iris and anv drivers
No performance impact is observed with WA.

Cc: mesa-stable
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2020-10-01 16:57:50 +00:00
..
2020-09-01 16:40:11 +00:00
2020-09-01 16:40:11 +00:00
2020-08-11 10:07:08 +03:00
2019-06-29 22:41:06 +01:00
2018-10-24 18:15:05 +01:00
2018-10-26 18:33:11 +01:00