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v2: (Francisco Jerez) - Drop vec4 changes. - Handle explicit acc0 operand and implicit one. - Make sure instruction is SIMD16, prediction is off and default mask control set to true. v3: (Francisco Jerez) - Clear accumulator only when it's written. - Use BRW_MASK_DISABLE instead of true. - Use correct width for brw_acc_reg(). - Fix last_inst_offset. v4: (Francisco Jerez) - Don't check for last instruction for accummulator write. Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Francisco Jerez <currojerez@riseup.net> Reviewed-by: Matt Turner <mattst88@gmail.com> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3376> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3376>