Lionel Landwerlin 04bd007757 intel/fs: require memory fence commit bit on Gfx9 ...

Fixes a hang on Gfx9 GT1 : dEQP-VK.compute.zero_initialize_workgroup_memory.max_workgroup_memory.128

Tested-by: Mark Janes <markjanes@swizzler.org>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15596>

2022-04-17 21:24:17 +00:00

..

blorp

blorp: disable depth bounds

2022-04-06 19:00:50 +00:00

ci

blorp: disable depth bounds

2022-04-06 19:00:50 +00:00

common

intel: fix URB programming for GT1s

2022-04-17 21:24:17 +00:00

compiler

intel/fs: require memory fence commit bit on Gfx9

2022-04-17 21:24:17 +00:00

dev

intel/dev: default to B stepping on DG2 for offline compiler

2022-03-23 10:24:31 +00:00

ds

intel/ds: fix compilation with perfetto

2022-02-08 12:29:21 +00:00

genxml

intel/genxml: Add SAMPLER_MODE bits for enabling Small PL on Icelake

2022-04-11 19:17:07 +00:00

isl

intel/isl: Add a helper for swizzling color values

2022-04-04 21:42:23 +00:00

nullhw-layer

intel/nullhw: fix build

2021-03-26 20:12:40 +00:00

perf

intel/perf: Fix OA report accumulation on Gfx12+.

2022-04-12 00:11:47 +00:00

tools

intel: remove chipset_id

2022-01-13 03:09:36 +00:00

vulkan

anv: use shadow surface for stencil input attachment on gfx7

2022-04-15 09:46:40 +03:00

Makefile.perf.am

intel: Rename GEN_PERF prefix to INTEL_PERF in build files

2021-04-20 20:06:34 +00:00

meson.build

anv: add perfetto source

2022-01-14 20:17:44 +00:00