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91 Commits

Author SHA1 Message Date
Jordan Justen
99fb15cd31 intel/dev: Add gen_device_info_is_12hp 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7757>
 2020-12-01 19:06:22 +00:00
Jordan Justen
b257795b10 intel/dev: Use GEN_GEN if defined for gen_device_info_is_9lp 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7757>
 2020-12-01 19:06:22 +00:00
Jason Ekstrand
6d5b57aeb7 intel/rt: Add a brw_rt.h header with #defines for basic RT data structures 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
 2020-11-25 05:37:09 +00:00
Jason Ekstrand
27f44116fe intel/debug: Add a debug flag for ray-tracing shaders 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
 2020-11-25 05:37:09 +00:00
Jason Ekstrand
5faf859ebb intel/dev: Add a gen_device_info::has_ray_tracing bit 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7356>
 2020-11-25 05:37:09 +00:00
Rob Clark
53f7d539cd util: Add helgrind support for simple_mtx 
Annoyingly mtypes.h pulls in simple_mtx, which means we end up needing
to sprinkle a lot of idep_mesautil around.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3773
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7644>
 2020-11-24 21:03:34 +00:00
Marcin Ślusarz
e3f6a9ea36 intel: remove dead code 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7353>
 2020-11-02 19:58:56 +00:00
Lionel Landwerlin
b03c86a71f intel/dev: Bump Max EU per subslice/dualsubslice 
This isn't a problem right now because the previous max would give the
same result when aligned to a byte (8bits).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7288>
 2020-10-30 08:22:26 +00:00
Jordan Justen
d399c3e861 intel/dev: Add device info for ADL-S 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7322>
 2020-10-27 20:42:38 +00:00
Ian Romanick
19aaafd4a6 intel: Remove Gen10-specific device entries 
The enables removal of gen_device_info::is_cannonlake.

v2: Remove GEN10_FEATURES and GEN10_HW_INFO macros.  Suggested by
Lionel.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>
 2020-10-15 09:29:54 -07:00
Ian Romanick
e22f106e01 intel: Disable all support for Gen10 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6899>
 2020-10-15 09:29:53 -07:00
Lionel Landwerlin
caea5a6a20 intel/dev: fix 32bit build issue 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7049>
 2020-10-08 05:42:31 +00:00
Marcin Ślusarz
9c25689287 intel: drop likely/unlikely around INTEL_DEBUG 
It's included in declaration of INTEL_DEBUG.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6732>
 2020-10-06 18:43:07 +00:00
Marcin Ślusarz
4015e1876a intel: add INTEL_DEBUG expected value in declaration 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6732>
 2020-10-06 18:43:07 +00:00
Lionel Landwerlin
9ad4b8b924 intel/dev: add a small non installable tool to print device info 
Mostly for debug purposes.

$ ./build/src/intel/dev/intel_device_info
/dev/dri/renderD128:
   name: Intel(R) UHD Graphics 620 (WHL GT2)
   gen: 9
   PCI id: 0x3ea0
   revision: 2
   slice0.subslice0: 11111111
   slice0.subslice1: 11111111
   slice0.subslice2: 11111111
   slices: 1
   subslices: 3
   EUs: 24
   EU threads: 168
   LLC: 1
   threads per EU: 7
   L3 banks: 4
   max VS  threads: 336
   max TCS threads: 336
   max TES threads: 336
   max GS  threads: 336
   max WM  threads: 256
   max CS  threads: 56
   timestamp frequency: 12000000

v2: Missing license (Marcin)
    Fix stderr usage (Marcin)

v3: Reformat topology printing (Marcin)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6957>
 2020-10-06 12:31:16 +00:00
Eric Anholt
efaea653b5 intel: Add support for i945g to intel_stub_gpu. 
I wanted to check the impact of nir-to-tgsi on the i915g driver, but I
don't have an i915 set up.  Similarly, for driconf refactoring I needed to
make sure that classic i915_dri.so still loaded.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6868>
 2020-09-29 19:53:22 +00:00
Marcin Ślusarz
ab07926057 intel: add INTEL_DEBUG=shaders 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6559>
 2020-09-04 12:09:22 +00:00
Lionel Landwerlin
9f0db069d3 anv: track the current frame and write it into the driver identifier BO 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2201>
 2020-08-07 11:27:54 +00:00
Anuj Phogat
559b26b7ee intel/ehl: Add new PCI-IDs 
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
 2020-07-14 21:10:04 -07:00
Anuj Phogat
7cb2ace465 intel/ehl: Rename gen_device_info struct 
Renaming makes it easier to relate a pciid with device configuration.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
 2020-07-14 21:10:04 -07:00
Anuj Phogat
13c70931f5 intel/ehl: Use macro GEN11_LP_FEATURES in device info 
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
 2020-07-14 21:10:04 -07:00
Anuj Phogat
e08ec89a19 intel/ehl: Use GEN11_URB_MIN_MAX_ENTRIES in device info 
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
 2020-07-14 21:10:04 -07:00
Eric Engestrom
b7b72681bd meson/intel: add missing dep on git_sha1.h 
Fixes: 805b32cab9 ("intel: add identifier for debug purposes")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylanx.c.baker@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5882>
 2020-07-13 21:26:25 +00:00
Kenneth Graunke
8278a46b26 intel: Disable loading drivers on DG1 devices for now 
Kernel support for DG1 has not yet been merged upstream; per our
long-standing DRM subsystem policy, we should not enable the platform
in userspace until the kernel patches are merged and functional.

We will re-enable this in the future.  In the meantime, we retain all
of the infrastructure and code for the platform so that we can continue
developing DG1 support in upstream.

See a discussion here:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956#note_547775

Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5617>
 2020-06-24 02:48:04 +00:00
Jordan Justen
c323e0ddf3 intel/dev: Add device info for DG1 
Reworks:
 * Anuj: Set is_dg1
 * Anuj: Add dg1 to gen_device_name_to_pci_device_id
 * Anuj: Update simulator id
 * Rafael: has_llc = false

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
 2020-06-22 11:42:00 -07:00
Rafael Antognolli
762e601f77 intel/devinfo: Add function to check for DRM_I915_GEM_GET_TILING. 
Future (discrete) platforms won't have support for get/set tiling. This
function allows our drivers to query for that, by simply trying to get
the tiling from a dummy buffer.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
 2020-06-22 11:42:00 -07:00
Anuj Phogat
f1fba99695 intel/devinfo: Add is_dg1 to device info 
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4956>
 2020-06-22 11:41:55 -07:00
Dylan Baker
a8e2d79e02 meson: use gnu_symbol_visibility argument 
This uses a meson builtin to handle -fvisibility=hidden. This is nice
because we don't need to track which languages are used, if C++ is
suddenly added meson just does the right thing.

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4740>
 2020-06-01 18:59:18 +00:00
Satyeshwar Singh
aaec065f03 intel/dev: Don't consider all TGL SKUs as GT1 only 
We should be passing _gt instead of 1 to GEN12_FEATURES or else all TGL
SKUs will be considered as gt1 only.

Fixes: 54996ad492 ("intel/dev: Split .num_subslices out of GEN12_FEATURES macro")
Signed-off-by: Satyeshwar Singh <satyeshwar.singh@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5261>
 2020-05-30 17:24:58 -07:00
Lionel Landwerlin
805b32cab9 intel: add identifier for debug purposes 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3203>
 2020-05-20 15:58:22 +00:00
Rafael Antognolli
bb3545a6ee intel: Store the aperture size in devinfo. 
We will later use the devinfo from iris_bufmgr, where we don't have
access to the screen pointer. And since we are moving it, we can reuse
it in Anv and i965.

v2: return error code and check for it on Anv (Lionel).
v3: Remove anv_gem_get_aperture() from anv_private.h and stubs (Lionel).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5043>
 2020-05-15 16:57:04 +00:00
Kenneth Graunke
ab16bff97d intel: Delete hardcoded devinfo->urb.size values for Gen7+ (sans DG1). 
On all Gen7+ platforms except DG1, the URB is a subsection of the
configurable L3 cache, and so the size can vary.  The size listed
in the documentation on those platforms is an "example size", picked
by calculating it based on an arbitrarily chosen L3 config.

Hardcoding a value for those platforms provides no value and only
confuses people trying to fill out these tables when doing hardware
enabling.  anv and iris never use this field.  i965 uses it to
initialize brw->urb.size, but then updates that in update_urb_size()
to be the correct value, so the initial value doesn't matter.

Delete the values for Gen7+ and update the comment accordingly.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4969>
 2020-05-11 09:40:56 -07:00
Jordan Justen
45c33313e6 intel/dev: Add device info for RKL 
Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by : Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4955>
 2020-05-09 01:39:43 +00:00
Jordan Justen
54996ad492 intel/dev: Split .num_subslices out of GEN12_FEATURES macro 
The .num_subslices field makes it problematic to reuse the
GEN12_FEATURES macro in other macros.

This also fixes the number of L3 banks for tgl gt1, except that this
was already fixed by Jason (dynamically) in:

86f67952d3 ("intel/devinfo: Compute the correct L3$ size for Gen12")

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by : Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4955>
 2020-05-09 01:39:43 +00:00
Caio Marcelo de Oliveira Filho
2a05ba5414 intel/dev: Bail when INTEL_DEVID_OVERRIDE is not valid 
Avoids surprises where you set an OVERRIDE but it gets ignored and the
system PCI ID is used.

Also fixes the bug that the error of invalid platform name being
printed too early, even when the passed platform was a PCI ID (which
is also supported).

For the case where euid != uid, a warning was added but the behavior
wasn't changed: it is still going to fallback to system PCI ID.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4841>
 2020-05-01 10:12:01 -07:00
Lionel Landwerlin
8c3c1d8a99 intel/dev: print out error when platform is not found by name 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4594>
 2020-04-30 11:32:54 +03:00
Francisco Jerez
65342be3ae intel/fs: Add INTEL_DEBUG=no32 debugging flag. 
This is useful in order to identify codegen issues caused by SIMD32.
It doesn't currently have any effect on compute shaders since SIMD32
dispatch is only enabled for CS when it's strictly necessary to do so
in order to support the workgroup size requested for the shader --
That might change in the future though when we hook up the SIMD32
heuristic to CS compilation.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
 2020-04-28 23:01:27 -07:00
Jason Ekstrand
86f67952d3 intel/devinfo: Compute the correct L3$ size for Gen12 
Fixes: 8125d7960b "intel/dev: Add preliminary device info for Tigerlake"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4782>
 2020-04-28 14:34:17 +00:00
Eric Engestrom
8970b7839a intel: drop unused include directories 
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
 2020-03-28 21:36:54 +01:00
Eric Engestrom
79af30768d meson: inline inc_common 
Let's make it clear what includes are being added everywhere, so that
they can be cleaned up.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
 2020-03-28 21:36:54 +01:00
Paulo Zanoni
aa78801f0a intel/device: bdw_gt1 actually has 6 eus per subslice 
Found by inspection, I'm not aware of any bugs caused by this typo.

According to Lionel, it seems we only use this to generate masks
of available EUs for perfromance queries, and it's only used when we
can't query the fused parts of the GPU through DRM_IOCTL_I915_QUERY.
So this patch should help for the corner case where the Kernel is too
old to support the query ioctl.

v2: improve commit message, cc stable (Lionel).

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4006>
 2020-03-03 00:36:10 +00:00
Rafael Antognolli
4aa7af9e9a intel: Load the driver even if I915_PARAM_REVISION is not found. 
This param is only available starting on kernel 4.1. Use a default
value of 0 if it is not found instead.

v2: Update commit message (Lionel)

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Mark Janes <mark.a.janes@intel.com>
Fixes: 96e1c945f2 ("i965: Move device info initialization to common
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3727>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3727>
 2020-02-06 09:46:51 +02:00
Matt Turner
49c21802cb intel/compiler: Split has_64bit_types into float/int 
Gen7 has 64-bit floats but not 64-bit ints.

Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
 2020-01-22 00:19:20 +00:00
Kenneth Graunke
a9bd0668d5 intel: Use similar brand strings to the Windows drivers 
This updates our product name strings to match the ones reported
by the Windows driver, which is typically the marketing name.

We retain a platform abbreviation and GT level in parenthesis so that
we're able to distinguish similar parts more easily, helping us better
understand at a glance which GPU a bug reporter has.

Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3371>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3371>
 2020-01-13 19:42:35 -08:00
Ross Zwisler
cabcbb4db0 intel: limit shader geometry on BDW GT1 
Similar to the SKL GT1 fix introduced here:

b1ba7ffdbd

we need to limit the .urb.max_entries[MESA_SHADER_GEOMETRY] on BDW GT1
to address failures in these two tests:

dEQP-GLES31.functional.geometry_shading.layered.render_with_default_layer_3d
dEQP-GLES31.functional.geometry_shading.layered.render_with_default_layer_2d_array

The value 690 was found via bisection.  691 is the actual max on the
hardware I'm using, but 690 seemed like a nice round number.

Signed-off-by: Ross Zwisler <zwisler@google.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3173>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3173>
 2019-12-20 10:47:52 +00:00
Anuj Phogat
1a32fbd48c intel: Add pci-ids for Jasper Lake 
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
 2019-12-09 12:22:57 -08:00
Anuj Phogat
11fdd5f52c intel: Add device info for 1x4x6 Jasper Lake 
Also removing the FIXME comments after matching the numbers with
updated documentation.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
 2019-12-09 12:22:56 -08:00
Lionel Landwerlin
39fd11a9f8 intel/dev: flag the Elkhart Lake platform 
We'll use this for performance metrics which are different from ICL.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
 2019-11-15 13:14:30 +00:00
Lionel Landwerlin
e02c181bfd intel/dev: set default num_eu_per_subslice on gen12 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8125d7960b ("intel/dev: Add preliminary device info for Tigerlake")
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
 2019-10-30 22:30:09 +00:00
Jordan Justen
8125d7960b intel/dev: Add preliminary device info for Tigerlake 
Reworks:
 * adjust 64-bit support, hiz (Jason Ekstrand)
 * sim-id (Lionel Landwerlin)
 * adjust threads, urb size (Rafael Antognolli)
 * adjust urb size (Kenneth Graunke)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
 2019-10-30 14:08:48 -07:00