Commit Graph

9925 Commits

Author SHA1 Message Date
Tatsuyuki Ishi e799b88449 radv,lvp,anv: Delete pre-common dispatch leftover.
These functions are no longer used since the introduction of common
dispatch.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18284>
2022-08-29 22:28:32 +00:00
Tatsuyuki Ishi ff6b1f4885 radv: Remove unused radv_deferred_queue_submission.
Has been stale since the common sync migration.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18284>
2022-08-29 22:28:32 +00:00
Tatsuyuki Ishi 400881e6c7 radv: Remove unused functions.
Grep shows no usage.
Found by manual inspection.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18284>
2022-08-29 22:28:31 +00:00
Samuel Pitoiset 40d8df7280 radv: emit the guardband state separately from the scissor state
Only re-emit the scissor state if viewports or scissors change, and
only re-emit the guardband state if viewports, line width or the
current rasterized primitive change.

This should reduce the number of emitted packets when only the line
width or the rasterized primitive change.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18247>
2022-08-29 19:40:36 +00:00
Samuel Pitoiset 3c2966fa1b radv: rework dirtying scissors when the line width changes
The guardband state (part of scissors) needs to be re-emitted when
the line width changes. Given this is a dynamic state, it's not
necessary to look at the pipeline line width.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18247>
2022-08-29 19:40:36 +00:00
Samuel Pitoiset 5bbb7de514 radv: split emitting guardband into a separate helper
This will be used to emit guardband separately from scissor.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18247>
2022-08-29 19:40:36 +00:00
Samuel Pitoiset fbbae5c0b9 radv: remove useless parameter in si_write_scissors()
It always starts from 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18247>
2022-08-29 19:40:36 +00:00
Samuel Pitoiset d88aba8946 radv: make sure to emit BREAK_BATCH when color write enable is dynamic
Color write enable can change CB_TARGET_MASK and emitting a BREAK_BATCH
seems needed for binning. Though, this was broken if this enable bit
changed dynamically for the same pipeline. Split the function to not
increase CPU overhead.

Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18233>
2022-08-29 19:21:12 +00:00
Samuel Pitoiset 3bcfdfb06e radv: store binning settings into the physical device
To avoid re-computing this every time.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18233>
2022-08-29 19:21:12 +00:00
Marcin Ślusarz 3531c1e315 nir/lower_task_shader: print shader after each step
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17618>
2022-08-29 12:42:40 +00:00
Rhys Perry 636450c274 aco: allow direct_fetch=true for vec4 VS input loads
This seems to be a (mostly harmless) mistake from 369b8cffea.

fossil-db (navi21):
Totals from 15 (0.01% of 135636) affected shaders:
Instrs: 1992 -> 1999 (+0.35%)
Latency: 13557 -> 13567 (+0.07%); split: -0.24%, +0.31%
InvThroughput: 4059 -> 4065 (+0.15%); split: -0.20%, +0.34%
Copies: 186 -> 193 (+3.76%)

fossil-db (polaris10):
Totals from 5 (0.00% of 135610) affected shaders:

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18225>
2022-08-26 15:28:55 +00:00
Rhys Perry 030d6f873e aco: don't expand vec3 VS input load to vec4 on GFX6
Removes the (small) possibility of invalid memory access.

fossil-db (pitcairn):
Totals from 35456 (26.15% of 135610) affected shaders:
MaxWaves: 259508 -> 260642 (+0.44%); split: +0.44%, -0.01%
Instrs: 7915383 -> 7965774 (+0.64%); split: -0.09%, +0.72%
CodeSize: 37163748 -> 37524804 (+0.97%); split: -0.04%, +1.01%
SGPRs: 1515128 -> 1513576 (-0.10%); split: -0.27%, +0.17%
VGPRs: 1218376 -> 1211160 (-0.59%); split: -0.71%, +0.12%
SpillSGPRs: 1152 -> 1144 (-0.69%)
Latency: 83777626 -> 83867137 (+0.11%); split: -0.61%, +0.72%
InvThroughput: 25722445 -> 25727745 (+0.02%); split: -0.23%, +0.25%
VClause: 232058 -> 230464 (-0.69%); split: -2.53%, +1.84%
SClause: 322579 -> 322108 (-0.15%); split: -0.76%, +0.61%
Copies: 547032 -> 547954 (+0.17%); split: -1.83%, +2.00%
Branches: 72538 -> 72542 (+0.01%)
PreVGPRs: 898453 -> 897584 (-0.10%); split: -0.13%, +0.03%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18225>
2022-08-26 15:28:55 +00:00
Rhys Perry 3c63ef0c98 radv/llvm: fix packed VS inputs on GFX6/GFX10+
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18225>
2022-08-26 15:28:55 +00:00
Rhys Perry 3260844448 aco: fix 16-bit VS inputs
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 3fba5bb9cc ("aco: implement 16-bit vertex fetches with tbuffer_load_format_d16_*")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18225>
2022-08-26 15:28:55 +00:00
Rhys Perry 9ae13a9bd3 radv: fix 16-bit support in radv_lower_vs_input
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: b366fef091 ("radv: optimize the number of loaded components for VS inputs in NIR")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18225>
2022-08-26 15:28:55 +00:00
Rhys Perry 82f9e40851 radv: remove claimed support for sRGB vertex buffer formats
These probably don't work.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18225>
2022-08-26 15:28:55 +00:00
Samuel Pitoiset cbd59647a8 radv: move determining NGG shader info to radv_fill_shader_info()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 45f04dae75 radv: move more MS info to gather_shader_info_ms()
Only the workgroup size computation remains at the same place, but I
think it should be computed in a separate helper later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset cae4eb2904 radv: move more CS info to gather_shader_info_cs()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset ac47d149c6 radv: add gather_shader_info_task() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 2ed573efeb radv: add gather_shader_info_cs() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 6554cee7b7 radv: add gather_shader_info_vs() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset ba11aeca6b radv: add gather_shader_info_tcs() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 4cec1f130b radv: add gather_shader_info_tes() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset f70a0d12da radv: add gather_shader_info_gs() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset f52b0dec3b radv: add gather_shader_info_mesh() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 4a2ebd6076 radv: add gather_shader_info_fs() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 4571126d26 radv: move filling cs.block_size
This is used for compute and task shaders and will help for adding
new helpers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 6f244ae9ad radv: stop gathering info for FS before other stages
This is no longer needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 31dc03e21e radv: link primitive ID/clip distance shader info from the new helper
No functional changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 96b9d9f081 radv: add a helper that links shader info between stages
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 8c6a252c74 radv: remove redundant VS output parameter assignments
assign_outinfo_params() should already assign them.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 2d0500d24a radv: fill radv_vs_output_info unconditionally for vertex related stages
That shouldn't change anything for VS as LS (or as ES) and for
TES as ES because radv_vs_output_info is only used by the last
vertex stage. So, if we have TES+GS, radv_vs_output_info for TES
will be overwritten by GS. This allows to decouple the shader info
pass from other stages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset ee5b9bcc57 radv: stop duplicating radv_vs_output_info
Only the last vertex stage needs to access this.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 45a0276cd1 radv/llvm: remove unused parameter in handle_vs_outputs_post()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 20ebdc3c2b radv: replace cs.uses_task_rings by ms.has_task
Task shaders always use a ring, so this field was useless somehow.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 03d2af30f6 radv: remove dead code about task ring when binding a compute pipeline
This is probably a leftover when task shader has been reworked, but it
has no effect.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 38ae5b6da6 radv: compute the ESGS itemsize outside of radv_nir_shader_info_pass()
radv_nir_shader_info_pass() should run on individual shaders only, and
"linked" shader info should be done separately for better design.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset dbf175f255 radv: use esgs_itemsize when calling ac_nir_lower_es_outputs_to_mem
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 0df2d5e318 radv: stop duplicating radv_es_output_info
This structure isn't really useful and it contains only one field.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset a04fd5c61f ac: constify ac_compute_cs_workgroup_size()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18210>
2022-08-26 14:07:09 +00:00
Samuel Pitoiset 8cd1683944 aco: fix wrong size for 1D images and A16 on GFX9
Size is in bytes, not bits.

Fixes plenty of crashes in CI, like
dEQP-VK.synchronization.op.single_queue.event.write_image_fragment_read_image_tess_eval.image_128_r32_uint.

Fixes: 46f6e2ddbb ("aco: Implement storage image A16.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18266>
2022-08-26 13:30:46 +00:00
Samuel Pitoiset 0250925f07 radv: destroy the pipeline layout if creating a library failed
It should be properly cleaned.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18252>
2022-08-26 13:08:29 +00:00
Samuel Pitoiset 39bebff1ac radv: fix missing initialization of the pipeline layout when creating a lib
The base object won't be initialized otherwise.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18252>
2022-08-26 13:08:29 +00:00
Samuel Pitoiset e6e8c092ff radv: remove bogus assertion about independent set layouts with GPL
layout->independent_sets can't be TRUE here.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18252>
2022-08-26 13:08:29 +00:00
Samuel Pitoiset 64045fcf7c radv: re-emit viewports if negative one to one or depth clamp mode changed
The following sequence would be broken if we don't re-emit viewports.

vkCmdSetViewport()
VkCmdBindPipeline(negative_one_to_one = false)
vkCmdDraw()
VkCmdBindPipeline(negative_one_to_one = true)
vkCmdDraw()

Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18245>
2022-08-26 12:46:41 +00:00
Samuel Pitoiset 68e69d002f radv: stop emitting RMW context registers for updating sample locations
RMW context registers have been removed in RadeonSI a while ago
because they don't seem good for performance.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18234>
2022-08-26 06:33:05 +00:00
Samuel Pitoiset 2f5891108a radv: cleanup dynamic states in radv_emit_graphics_pipeline()
Some dynamic states always need to be emitted when the first pipeline
is emitted, some others depend on pipeline state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18234>
2022-08-26 06:33:05 +00:00
Samuel Pitoiset 85a55009be radv: stop clearing bitfields for registers that are emitted dynamically
These fields aren't set at pipeline creation, so clearing them is
just useless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18234>
2022-08-26 06:33:05 +00:00
Samuel Pitoiset 7aaa016b23 radv: stop setting CB_COLOR_CONTROL.ROP3 from the pipeline
This is useless because logic op is a dynamic state and it's already
emitted from the cmdbuf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18234>
2022-08-26 06:33:05 +00:00