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Author SHA1 Message Date
Juan A. Suarez Romero f58a11460d v3d: add fast-path tile-based blit for depth/stencil buffers 
This extends the TLB based blit to support both depth and stencil
buffers.

v2:
 - Ammend comment for further clarification (Iago)
 - Remove parenthesis (Iago)
 - Remove condition so separate stencil blit is done (Iago)

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8304>
 2021-01-13 12:49:37 +00:00
Juan A. Suarez Romero 79bf06605d v3d: check blit mask inside blit subpaths 
Move the blit mask check (RGBA, Depth/Stencil) inside the blit paths
(stencil, TFU, TLB and render blit paths).

v2:
 - Add missing Fixes tag (Iago)

Fixes: 1c76f6e755 ("v3d: implement tile-based blit operation")
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8304>
 2021-01-13 12:49:37 +00:00
Samuel Pitoiset fcd5925612 radv: skip fast-clear eliminate for CMASK based on a predicate 
If we have CMASK, we can also skip FCE like we do for DCC.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8332>
 2021-01-13 12:24:32 +01:00
Samuel Pitoiset 697c93abc1 radv: update the FCE predicate for fast clears using CMASK 
Fast clearing with CMASK should always be eliminated.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8332>
 2021-01-13 12:24:30 +01:00
Samuel Pitoiset 051e2bfe80 radv: allocate and initialize the FCE predicate value for CMASK too 
In case we don't have DCC, we can still predicate FCE with CMASK.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8332>
 2021-01-13 12:24:29 +01:00
Samuel Pitoiset 735b808639 radv: only use predication if the FCE value is allocated 
The FCE predicate value is only allocated if DCC is enabled.
We only want to use predication for DCC decompressions and for FCE
but not having FMASK doesn't mean the predicate is allocated.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4075
Fixes: 6e7008e94b ("radv: do not predicate FMASK decompression when DCC+MSAA is used")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8441>
 2021-01-13 11:13:47 +00:00
Danylo Piliaiev 5331b1d945 turnip: implement indirect dispatch 
Vulkan guarantees only 4 byte alignment of offset for vkCmdDrawIndirect,
while CP_LOAD_STATE.EXT_SRC_ADDR requires 16 byte alignment which
makes us copy indirect parameters to a correctly aligned buffer.

Blob does essentially the same but emits indirect CP_LOAD_STATE
with src = SS6_UBO and EXT_SRC_ADDR = 0xe0000, and only for a
first dispatch.

Fixes:
dEQP-VK.compute.indirect_dispatch.*

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8444>
 2021-01-13 09:55:47 +00:00
Danylo Piliaiev a6ae7b2421 turnip: remove unused IR3_DP_LOCAL_GROUP_SIZE_* from cs params 
In Turnip local group size is lowered in NIR via
nir_lower_compute_system_values.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8444>
 2021-01-13 09:55:47 +00:00
Pierre-Eric Pelloux-Prayer 8ecace073e st/mesa: use the correct src format in ReadPixels 
If reading from an FBO that uses a texture view src->format will
be the format of the original texture, not from the view.

Acked-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8387>
 2021-01-13 09:33:49 +01:00
Pierre-Eric Pelloux-Prayer a6fe1eeb05 mesa/fbo: don't check_end_texture_render on fb read change 
Otherwise this resets is_rtt to false in st/mesa, and then
breaks fbo + texture view.

This change also aligns the code with the comment above:
    * Note that if the ReadBuffer has texture attachments we don't consider
    * that a render-to-texture case.

Acked-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8387>
 2021-01-13 09:33:49 +01:00
Pierre-Eric Pelloux-Prayer 5d9bfcac06 st/mesa: consider texture view format for fbo blits 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4034
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8387>
 2021-01-13 09:33:49 +01:00
Gert Wollny 354ab5b147 r600/nir: use "unreachable" instead of "assert" 
In release builds the assert goes away resulting in build failures
because no return value was specified.

Fixes 165fb5117b
   r600/sfn: add lowering passes to get 64 bit ops lowered to 32 bit vec2

Closes #4089

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8465>
 2021-01-13 08:00:55 +00:00
Samuel Pitoiset dbe845624b radv: fix clearing DCC on GFX9 
dcc_slice_size is in DWORD on GFX9... Also, layers aren't supported
because they might be interleaved. Fix this by clearing the entire
DCC buffer.

Fixes: 5e8f6967b1 ("radv: add support for fast-clearing DCC layers on GFX9+")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8443>
 2021-01-13 08:33:40 +01:00
Christian Gmeiner 36e1c902b9 v3d: mark some variables static const 
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8438>
 2021-01-13 07:24:32 +00:00
Christian Gmeiner 9151dab967 v3d: update fallthrough comments 
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8438>
 2021-01-13 07:24:32 +00:00
Christian Gmeiner 4ec956a2b0 v3d: drop not use function parameter 
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8438>
 2021-01-13 07:24:32 +00:00
Vinson Lee a908abd6c4 nv50/ir: Initialize CodeEmitterGM107 members in constructor. 
Fix defects reported by Coverity Scan.

uninit_member: Non-static class member progType is not initialized
in this constructor nor in any functions that it calls.
uninit_member: Non-static class member insn is not initialized in
this constructor nor in any functions that it calls.
uninit_member: Non-static class member data is not initialized in
this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7390>
 2021-01-12 22:34:32 -08:00
Icecream95 9c8dfe4a65 panfrost: Fix size assertion in bi_alu_src_index 
Shifting by the bitsize was not only wrong, the shift is undefined
behavior when bitsize is 32, causing the assertion to fire on AArch32.

Fixes: 95d62ee7cf ("pan/bi: Add bi_alu_src_index helper")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8460>
 2021-01-13 03:53:45 +00:00
Nanley Chery c62996796c dri: Restrict glthread for CS:GO to radeonsi 
Fixes a ~12% performance regression in iris.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8448>
 2021-01-13 00:29:40 +00:00
Icecream95 bfcdc8f174 pan/bi: Add some zero bytes after shaders on Bifrost 
Bifrost will prefetch bytes after the end of shaders, so make sure
these bytes are allocated and zeroed.

Fixes GPU faults in Xonotic.

Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8428>
 2021-01-13 00:11:20 +00:00
Icecream95 e74b2edcef pan/bi: Add a define for the Bifrost shader prefetch size 
Found by adding NOPs to the start of a shader and checking dmesg to
see at what sizes the GPU faulted trying to read the following
non-executable page.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8428>
 2021-01-13 00:11:19 +00:00
Bas Nieuwenhuizen 9a937330ef radeonsi: Only set modifier creation function for GFX9+ & with kernel support. 
Fixes: c786150dfa ("radeonsi: Add modifier support.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3963
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8407>
 2021-01-12 23:47:09 +00:00
Boris Brezillon 3dcc9eb48a panfrost: Re-enable AFBC on 3D, 2D arrays 
Things have now been fixed and AFBC on 3D/2D-arrays seems to work fine.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8449>
 2021-01-12 22:40:44 +00:00
Boris Brezillon 38823ba60d panfrost: Fix estimate_texture_payload_size() on Bifrost 
Bifrost mandates manual stride usage.

Fixes: a3d2936a8e ("panfrost: The texture descriptor has a pointer to a trampoline")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8449>
 2021-01-12 22:40:44 +00:00
Boris Brezillon 2cf41ae494 panfrost: Pass the resource dimension to panfrost_compression_tag() 
The reload surface logic creates 2D image views pointing to a specific
3D texture layer, but panfrost_compression_tag() cares about the resource
dimension, not the image view one.

Fixes: 4dd7991422 ("panfrost: Add a pan_image_layout object")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8449>
 2021-01-12 22:40:44 +00:00
Boris Brezillon 6aed981e9d panfrost: Get layer stride of level 0 on staging resources 
Staging resources have one level, we shouldn't query the stride of
level > 0.

Fixes: 3c92abe359 ("panfrost: Use panfrost_get_layer_stride() instead of open-coding it")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8449>
 2021-01-12 22:40:44 +00:00
Georg Lehmann fff77e4b43 vulkan/overlay: fix vkGetInstanceProcAddr self-resolving 
vkGetInstanceProcAddr(instance, "vkGetInstanceProcAddr") should return our
vkGetInstanceProcAddr not the next in the chain.

CC: mesa-stable
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8285>
 2021-01-12 22:27:49 +00:00
Icecream95 041261c6b3 panfrost: Dual-source blending on Bifrost 
Tested with the arb_blend_func_extended Piglit tests and Alacritty.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8455>
 2021-01-12 21:05:01 +00:00
Bas Nieuwenhuizen 4956f6d0bf radv: Add Android module info to linker script. 
The Android Vulkan loader needs this symbol, so the addition of the
linker script broke Vulkan for Android.

(For non-Android builds: I checked that having a non-existent symbol in
 the linker script works ok and doesn't put the symbol in the library)

Fixes: 41bb6459d3 ("radv: restrict exported symbols with static llvm")
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8437>
 2021-01-12 20:17:52 +00:00
Eric Anholt 46fe700585 gallium/ntt: Take ownership of the NIR shader we're passed. 
It makes no sense for the caller to keep it, since we've throughly changed
it to be suitable to NTT.  All callers just freed it afterward anyway.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8422>
 2021-01-12 19:46:22 +00:00
Eric Anholt a4a5045d59 mesa/st: Free the ARB_vp/fp nir-to-tgsi temporary tokens. 
The driver interface doesn't take ownership of the TGSI tokens, so free
our temporary.

Fixes: cf3fc79cd0 ("st/mesa: Replace mesa_to_tgsi() with prog_to_nir() and nir_to_tgsi().")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8422>
 2021-01-12 19:46:22 +00:00
Eric Anholt 4ddcd9cf16 mesa/st: Free the NIR builtins TGSI tokens after passing to the driver. 
The driver interface doesn't take ownership of the TGSI tokens, so free
our temporary.

Fixes: 57effa342b ("st/mesa: Drop the TGSI paths for PBOs and use nir-to-tgsi if needed.")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8422>
 2021-01-12 19:46:22 +00:00
Eric Anholt 0367bdbdc4 gallium/ntt: Fix leak of the per-instr liveness information. 
Fixes: 34cc6a804e ("gallium: Add a nir-to-TGSI pass.")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8422>
 2021-01-12 19:46:21 +00:00
Gert Wollny afa187fc36 r600: enable fp64 lowering to softemu with NIR 
The NIR code path does not (yet) take hardware into account
that actually supports fp64 in hardware.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7824>
 2021-01-12 19:29:40 +00:00
Gert Wollny 33362e0df5 r600: enable support for 64 bit DIVMOD when NIR is used 
The glsl lowering seems to be broken, but the nir lowering pass handles
this correctly.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7824>
 2021-01-12 19:29:40 +00:00
Gert Wollny 0bed972619 r600/sfn: tie in 64 lowering code 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7824>
 2021-01-12 19:29:40 +00:00
Gert Wollny 165fb5117b r600/sfn: add lowering passes to get 64 bit ops lowered to 32 bit vec2 
The lower_double and lower_int64 don't lower all 64 bit IO ops and merging
to and splitting fromn 64 bit values. So here goes a bunch of lowering
passes that takes care of this and also of merging IO that might have been
split.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7824>
 2021-01-12 19:29:40 +00:00
Gert Wollny 0862680e2d r600/sfn: Add number for source components for split_y 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7824>
 2021-01-12 19:29:40 +00:00
Gert Wollny de4e4980d8 r600/sfn: C++ lower-instruct implementation 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7824>
 2021-01-12 19:29:40 +00:00
Icecream95 5f7bafa316 panfrost: Enable ARB_texture_buffer_object 
Tested with the arb_texture_buffer_object and arb_texture_buffer_range
piglit tests.

Exposes OpenGL 3.1 by default on T760+

    $ PAN_MESA_DEBUG= glxinfo | grep "GL version"
    OpenGL version string: 3.1 Mesa 21.0.0-devel

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8300>
 2021-01-12 19:06:00 +00:00
Icecream95 ffb5488c73 panfrost: Fix textureSize for buffer textures 
Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8300>
 2021-01-12 19:06:00 +00:00
Icecream95 388843526b panfrost: Support buffer sampler views 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8300>
 2021-01-12 19:06:00 +00:00
Icecream95 473728a9b9 panfrost: Make the width argument to panfrost_new_texture 32 bits 
This is needed to represent a width of exactly 65536, which is
required by ARB_texture_buffer_object.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8300>
 2021-01-12 19:06:00 +00:00
Icecream95 b9ecbc3272 st/mesa: Use samplers for buffer textures if requested 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8300>
 2021-01-12 19:06:00 +00:00
Icecream95 d5d3f77e4a gallium: Add new cap PIPE_CAP_TEXTURE_BUFFER_SAMPLER 
This indicates whether a driver wants samplers for buffer textures as
well as normal textures.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8300>
 2021-01-12 19:06:00 +00:00
Timur Kristóf 4ee6d68d1f aco: Wait for stores when NGG or legacy VS can finish early. 
When there are no param exports in an NGG (or legacy VS) shader,
the NO_PC_EXPORT=1 is set, which means PS waves can launch before
the current stage finishes.

If the current stage has any stores, we need to make sure to wait for
those before we allow PS waves to start, so that PS can read what
these instructions stored.

Fossil DB results on Navi 10:
Totals from 45 (0.03% of 136420) affected shaders:
CodeSize: 87224 -> 87404 (+0.21%)
Instrs: 16750 -> 16795 (+0.27%)
Cycles: 69580 -> 69760 (+0.26%)
VMEM: 8022 -> 8167 (+1.81%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7868>
 2021-01-12 16:43:27 +00:00
Timur Kristóf 38da379b3e aco: Note if rasterization can start early. 
When there are no param exports in an NGG (or legacy VS) shader,
the NO_PC_EXPORT=1 is set by RADV, which means PS waves can launch
before the current stage finishes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7868>
 2021-01-12 16:43:27 +00:00
Daniel Schürmann 00cf077c15 aco/ra: fix infinite recursion in get_reg_simple() with subdword registers 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

Fixes: f8c7661eca ('aco: try to better align 8+ dword SGPR vectors')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8425>
 2021-01-12 16:14:00 +00:00
Daniel Schürmann 7b669ff789 aco: simplify and fix operand/definition sizes 
These are mainly needed for constant propagation
and subdword register allocation.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8425>
 2021-01-12 16:14:00 +00:00
Daniel Schürmann d495a5c183 radv: enable .lower_ineg 
We already emit ineg as isub most of the time.

The results are a bit mixed, but shouldn't really make a difference.
A couple of additional copies are needed as isub writes scc.

Totals from 5975 (4.29% of 139391) affected shaders:
CodeSize: 31508648 -> 31509264 (+0.00%); split: -0.00%, +0.00%
Instrs: 6073379 -> 6073531 (+0.00%); split: -0.00%, +0.00%
Cycles: 47186280 -> 47187116 (+0.00%); split: -0.00%, +0.00%
VMEM: 2528515 -> 2529139 (+0.02%); split: +0.03%, -0.01%
SMEM: 596842 -> 596924 (+0.01%); split: +0.02%, -0.00%
SClause: 280596 -> 280594 (-0.00%)
Copies: 288554 -> 288669 (+0.04%); split: -0.00%, +0.04%
PreSGPRs: 240390 -> 240397 (+0.00%)
PreVGPRs: 349630 -> 349749 (+0.03%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8425>
 2021-01-12 16:14:00 +00:00