Commit Graph

6304 Commits

Author SHA1 Message Date
Lionel Landwerlin
8955d179d3 anv: fix MI_PREDICATE_RESULT write
This register is only 32bits.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1952fd8d2c ("anv: Implement VK_EXT_conditional_rendering for gen 7.5+")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9428>
2021-03-05 16:19:20 +00:00
Iván Briano
194e477615 anv: don't advertise mipmaps for linear 3D surfaces on BDW
Prior to SKL, the mipmaps for 3D surfaces are laid out in a way
that make it impossible to represent in the way that
VkSubresourceLayout expects. Since we can't tell users how to make
sense of them, don't report them as available.

"Fixes" dEQP-VK.image.subresource_layout.3d.*

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9419>
2021-03-04 16:23:23 -08:00
Lionel Landwerlin
8023d6de20 anv: implement INTEL_DEBUG=submit
Name all the BOs!

v2: Fix 32bit build issue (Thanks Marge!)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5736>
2021-03-04 19:46:24 +02:00
Jason Ekstrand
1e53e0d2c7 intel/mi_builder: Drop the gen_ prefix
mi_ is already a unique prefix in Mesa so the gen_ isn't really gaining
us anything except extra characters.  It's possible that MI_ may
conflict a tiny bit with GenXML but it doesn't seem to be a problem
today and we can deal with that in the future if it's ever an issue.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9393>
2021-03-04 15:14:27 +00:00
Jason Ekstrand
6d522538b6 intel: Rename gen_mi_builder.h to mi_builder.h
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9393>
2021-03-04 15:14:27 +00:00
Lionel Landwerlin
0f437e49c6 anv: fix missing general state pool in validation list
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 83fee30e85 ("anv: allow multiple command buffers in anv_queue_submit")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9388>
2021-03-03 18:24:16 +00:00
Rhys Perry
cbb5ed476c nir/opt_shrink_vectors: add option to skip shrinking image stores
Some games declare the wrong format, so we might want to disable this
optimization in that case.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: e4d75c22 ("nir/opt_shrink_vectors: shrink image stores using the format")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9229>
2021-03-03 14:18:37 +00:00
Eric Anholt
1e5ef4c60c nir: Add a nir_src_is_undef() helper, like nir_src_is_const().
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9345>
2021-03-03 00:51:44 +00:00
Tapani Pälli
fd7d34f716 anv: toggle on sample shading if it is set in the shader
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4300
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9040>
2021-03-02 06:19:09 +00:00
Jordan Justen
18bc7d9d3f intel: Use devinfo genx10 field
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9329>
2021-03-01 22:00:08 -08:00
Jordan Justen
d846901d9d intel/dev: Add devinfo genx10 field
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9329>
2021-03-01 22:00:08 -08:00
Jordan Justen
36dd7c44f6 intel: Use GEN_VERSIONx10 in more places
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9329>
2021-03-01 22:00:08 -08:00
Lionel Landwerlin
0a7224f3ff anv: group as many command buffers into a single execbuf
When semaphores are not involved, try to batch things up as much as
possible across VkSubmitInfo and also batch command buffers within a
VkSubmitInfo.

v2: Reuse anv_cmd_buffer_is_chainable()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2371>
2021-02-27 17:14:25 +02:00
Lionel Landwerlin
83fee30e85 anv: allow multiple command buffers in anv_queue_submit
v2: Fixup crash spotted by Mark about missing alloc vfuncs

v3: Fixup double iteration over device->memory_objects (that ought to
    be expensive...) (Ken)

v4: Add more asserts for non-softpin cases (Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2371>
2021-02-27 17:13:32 +02:00
Lionel Landwerlin
882fc72442 anv: end command buffer with a potential jump
We would like to chain multiple primary command buffer to be submitted
together to i915. For prepare this, add end the command buffers with a
MI_BATCH_BUFFER_START and at submit time, replace it with
MI_BATHC_BUFFER_END if needed.

v2: Don't even consider non softpin platforms

v3: Fix inverted condition

v4: Limit is_chainable() to checking device->use_softpin (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2371>
2021-02-27 13:29:07 +02:00
Lionel Landwerlin
8446f4733f anv: track the end of the command buffers
Where MI_BATCH_BUFFER_END is recorded.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2371>
2021-02-27 13:29:07 +02:00
Lionel Landwerlin
38f6c09086 anv: make use of new helper function directly in anv_QueueSubmit()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2371>
2021-02-27 13:29:06 +02:00
Mike Blumenkrantz
025b57524f anv: for_each_bit -> foreach_bit
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9191>
2021-02-24 17:11:44 +00:00
Francisco Jerez
4132337b8a anv/gen12: Implement programming of pixel pipe hashing tables.
See previous commit "iris/gen12: Implement programming of pixel pipe
hashing tables." for the rationale.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8749>
2021-02-23 21:15:56 -08:00
Francisco Jerez
11febd50e2 anv/gen11+: Calculate pixel hashing tables instead of hardcoding.
See commit "iris/gen11+: Calculate pixel hashing tables instead of
hardcoding." for the rationale.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8749>
2021-02-23 21:15:36 -08:00
Francisco Jerez
e2ef1c4676 intel/dev: Implement pixel pipe subslice counting for Gen12+.
Unlike Gen11, Gen12 hardware supports up to three pixel pipes per
slice.

Unfortunately the kernel interface is somewhat inconsistent between
Gen11 and Gen12: I915_PARAM_SUBSLICE_MASK returns a mask of enabled
*dual* subslices since TGL, so there is half the number of bits per
pixel pipe in the mask.  This is worked around here so we're able to
calculate the correct size of each pixel pipe, but the result is
returned in dual subslice units, inheriting the inconsistency from the
kernel -- Reason is that as of now all our Gen12 subslice counts
returned by gen_device_info.c are really dual subslice counts, and the
num_eu_per_subslice counts are also scaled accordingly, so it seems
like it would only make the matter worse if I fixed the units of this
field only without also fixing the rest.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8749>
2021-02-23 21:15:06 -08:00
Francisco Jerez
ab076e19ed intel/genxml: Define 3DSTATE_SUBSLICE_HASH_TABLE command for Gen12 and Gen12.5.
This command allows programming custom pixel hashing tables
controlling the balancing of load across pixel pipes.  Rather
confusingly 3DSTATE_SLICE_TABLE_STATE_POINTERS was serving the same
purpose on Gen11: A pixel is mapped to the pixel pipe with index
specified by the entry in the table corresponding to the LSBs of the
pixel coordinates [Yes you read right the entries are neither subslice
nor slice indices!].  Either a 2-way or a 3-way table can be
programmed based on whether the platform has two or three pixel pipes
per slice.  In addition the 16x8 tables defined below can hold two
separate 8x8 tables when in DUAL_TABLE mode (which AFAIA is only
useful for platforms with multiple asymmetric slices -- I.e. no
production platforms as of today to my knowledge).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8749>
2021-02-23 21:14:57 -08:00
Francisco Jerez
a2a17bf25e intel/genxml: Fix pixel hashing 3DSTATE_3D_MODE field definitions for Gen12 and Gen12.5.
The former "Subslice Hashing Mode" field is no longer used by the
hardware, Gen12 parts always do 16x16 subslice pixel hashing -- Remove
it since it's no longer useful.  In addition add a couple of bits that
will be useful in order to make some adjustments to the default pixel
pipe hashing behavior.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8749>
2021-02-23 21:14:42 -08:00
Ian Romanick
52eb47c8d4 intel/compiler: Relax some conditions in try_copy_propagate
Previously can_do_source_mods was used to determine whether a value with
a source modifier or a value from a scalar source (e.g., a uniform)
could be copy propagated.  The former is a superset of the latter, so
this always produces correct results, but it is overly restrictive.  For
example, a BFI instruction can't have source modifiers, but it can have
scalar sources.

This was originally authored to prevent a small number of shader-db
regressions in a commit that marked SHR has not being able to have
source modifiers.  That commit has since been dropped in favor of a
different method.

v2: Refactor register region restriction detection to a helper function.
Suggested by Jason.

No fossil-db changes on any Intel platform.

All Gen7+ platforms had similar results. (Ice Lake shown)
total instructions in shared programs: 20039111 -> 20038943 (<.01%)
instructions in affected programs: 31736 -> 31568 (-0.53%)
helped: 104
HURT: 0
helped stats (abs) min: 1 max: 9 x̄: 1.62 x̃: 1
helped stats (rel) min: 0.30% max: 0.88% x̄: 0.45% x̃: 0.42%
95% mean confidence interval for instructions value: -2.03 -1.20
95% mean confidence interval for instructions %-change: -0.47% -0.42%
Instructions are helped.

total cycles in shared programs: 980309750 -> 980308897 (<.01%)
cycles in affected programs: 591078 -> 590225 (-0.14%)
helped: 70
HURT: 26
helped stats (abs) min: 2 max: 622 x̄: 23.94 x̃: 4
helped stats (rel) min: <.01% max: 2.85% x̄: 0.33% x̃: 0.12%
HURT stats (abs)   min: 2 max: 520 x̄: 31.65 x̃: 6
HURT stats (rel)   min: 0.02% max: 2.45% x̄: 0.34% x̃: 0.15%
95% mean confidence interval for cycles value: -26.41 8.64
95% mean confidence interval for cycles %-change: -0.27% -0.03%
Inconclusive result (value mean confidence interval includes 0).

No shader-db changes on earlier Intel platforms.

Reviewed-by: Anuj Phogat anuj.phogat@gmail.com [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9237>
2021-02-23 15:11:37 -08:00
Ian Romanick
3f18faea30 intel: Silence unused parameter warnings in files that include genX_pack.h
src/intel/genxml/gen4_pack.h: In function ‘__gen_address’:
src/intel/genxml/gen4_pack.h:115:38: warning: unused parameter ‘start’ [-Wunused-parameter]
  115 |               NDEBUG_UNUSED uint32_t start, uint32_t end)
      |                             ~~~~~~~~~^~~~~

Reviewed-by: Anuj Phogat anuj.phogat@gmail.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9237>
2021-02-23 15:11:37 -08:00
Ian Romanick
b5cf60b75d intel: Silence unused parameter warnings in files that include gen_device_info.h
src/intel/dev/gen_device_info.h: In function ‘unsigned int gen_device_info_num_dual_subslices(const gen_device_info*)’:
src/intel/dev/gen_device_info.h:311:66: warning: unused parameter ‘devinfo’ [-Wunused-parameter]
  311 | gen_device_info_num_dual_subslices(const struct gen_device_info *devinfo)
      |                                    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~

Reviewed-by: Anuj Phogat anuj.phogat@gmail.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9237>
2021-02-23 15:11:37 -08:00
Ian Romanick
0da47c4019 intel/compiler: Silence unused parameter warnings in files that include brw_eu.h
src/intel/compiler/brw_eu.h: In function ‘uint32_t brw_btd_spawn_msg_type(const gen_device_info*, uint32_t)’:
src/intel/compiler/brw_eu.h:1040:54: warning: unused parameter ‘devinfo’ [-Wunused-parameter]
 1040 | brw_btd_spawn_msg_type(const struct gen_device_info *devinfo,
      |                        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~
src/intel/compiler/brw_eu.h: In function ‘uint32_t brw_btd_spawn_exec_size(const gen_device_info*, uint32_t)’:
src/intel/compiler/brw_eu.h:1047:55: warning: unused parameter ‘devinfo’ [-Wunused-parameter]
 1047 | brw_btd_spawn_exec_size(const struct gen_device_info *devinfo,
      |                         ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~
src/intel/compiler/brw_eu.h: In function ‘uint32_t brw_rt_trace_ray_desc_exec_size(const gen_device_info*, uint32_t)’:
src/intel/compiler/brw_eu.h:1065:63: warning: unused parameter ‘devinfo’ [-Wunused-parameter]
 1065 | brw_rt_trace_ray_desc_exec_size(const struct gen_device_info *devinfo,
      |                                 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~

Reviewed-by: Anuj Phogat anuj.phogat@gmail.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9237>
2021-02-23 15:11:37 -08:00
Lionel Landwerlin
b0b1bf9957 anv: Fix wait_count missing increment
If we don't wait on anything, I bet it makes the QueuePresent faster,
but also completely wrong...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 02f94c3306 ("anv: don't wait for completion of work on vkQueuePresent()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4276
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9211>
2021-02-23 15:39:42 +00:00
Christian Gmeiner
3fbde2fd93 nir: add has_txs flag
Some nir lowerings might need to know if txs is supported by
the backend.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8898>
2021-02-23 14:04:30 +00:00
Lionel Landwerlin
02f94c3306 anv: don't wait for completion of work on vkQueuePresent()
Another mistake which is that we don't use the right wait API.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 829699ba63 ("anv: implement shareable timeline semaphores")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4276
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9188>
2021-02-22 21:43:05 +00:00
Lionel Landwerlin
cb74cd816c anv: reset binary syncobj to be signaled before submission
Before we introduced the submission thread in 829699ba63, once we
returned from vkQueueSubmit, all signaled syncobj would have a
i915_request/dma-fence waiting to be signaled by some work that would
submitted to HW by i915.

After this submission thread that is no longer the case. We added a
few checks in places like vkQueuePresentKHR() to wait for the binary
semaphores to materialize before we would hand things over to the WSI
code.

Unfortunately 829699ba63 forgot to reset the signaled binary
semaphore.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 829699ba63 ("anv: implement shareable timeline semaphores")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4276
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9188>
2021-02-22 21:43:05 +00:00
Lionel Landwerlin
8b44e45347 intel/perf: fix roll over PERF_CNT counter accumulation
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 5ba6d9941b ("intel/perf: add mdapi writes for register perf counters")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9163>
2021-02-22 12:15:54 +00:00
Lionel Landwerlin
018393d851 intel/perf: Add Alderlake metrics
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9186>
2021-02-22 13:49:53 +02:00
Lionel Landwerlin
65b6eacb0b intel/dev: identify alderlake
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9186>
2021-02-22 13:49:41 +02:00
Mark Janes
f54a65c69b intel: check setuid before writing output file in INTEL_MEASURE
Without this check, the INTEL_MEASURE environment variable could be
misused to overwrite arbitrary files.

Fixes: 0f4143ec37 ("intel: Print GPU timing data based on INTEL_MEASURE")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9166>
2021-02-20 11:53:33 -08:00
Jason Ekstrand
7c8c14a988 intel/mi_builder: Add tests for gen_mi_z and gen_mi_nz
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand
9145d77707 intel/mi_builder: Rewrite unit tests in terms of constant folding
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand
efdbe53eda intel/mi_builder: Add constant folding
This also serves as pretty clear documentation of each helper's
semantics.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand
dbcbb321ad intel/mi_builder: Short-circuit shifts in more cases
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand
c64d7aa8e3 intel/mi_builder: Fix a misleading comment
This doesn't actually assume the top 32 bits of the source value are
zero.  Instead, it does (src >> shift) & UINT32_MAX regardless of what
the top bits of src are.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand
40df12d4ce intel/mi_builder: Delete a bogus comment
It actually returns ~0/0.  We're about to make things more self-
documenting so we can delete the comment instead of fixing it.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Jason Ekstrand
749ae5af93 intel/mi_builder: Create a context in the tests
This makes them work on the simulator

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9116>
2021-02-18 21:28:40 +00:00
Lionel Landwerlin
d8ce76977f anv: track buffer creation flags
So we know a buffer is protected.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9127>
2021-02-18 11:21:14 +02:00
Lionel Landwerlin
d6294a13a6 anv: track command buffer pool flags
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9127>
2021-02-18 11:21:03 +02:00
Lionel Landwerlin
207ee2b6a9 isl: add external parameter to isl_mocs()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9127>
2021-02-18 11:20:59 +02:00
Lionel Landwerlin
e484478727 genxml: Add PIPE_CONTROL protected memory bits
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9127>
2021-02-18 11:20:55 +02:00
Lionel Landwerlin
1b43528ade genxml: add MI_SET_APPID on Gen12+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9127>
2021-02-18 11:20:51 +02:00
Jason Ekstrand
7c63be7ffc anv/android: Re-implement AcquireImageANDROID
Instead of doing a vkQueueSubmit() and hoping for the best, use the
actual sync FD that gets passed in from SurfaceFlinger.  The semaphore
and fence FD import functions already handle the -1 case for us so the
implementation is almost trivial.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Chad Versace <chad@kiwitree.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8814>
2021-02-18 06:11:05 +00:00
Jason Ekstrand
56d005c21c anv/formats: Advertise linear sampling on depth formats
They've all supported it since either forever or Iron Lake which is
equivalent to forever for Vulkan.

From Kenneth Graunke's GitLab review:

    "Linear blending of depth buffer data is usually fairly nonsense
    (something's 2 meters away?  another thing's 6 meters away?  let's
    just report 4 meters?)...but it's definitely a thing we can do, so
    we may as well let apps do it, and trust them not when it doesn't
    make sense."

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9110>
2021-02-17 23:43:22 +00:00
Anuj Phogat
69e94e8939 intel/anv: Fix condition for planar yuv surface
Test the sampler->conversion for NULL pointer before dereferencing it.

Fixes: Regressions in VulkanCTS.
Fixes: 226316116c "intel/anv: Fix condition to set MipModeFilter for YUV surface"
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2021-02-17 15:08:44 -08:00