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2520 Commits

Author SHA1 Message Date
Pierre-Eric Pelloux-Prayer 115b61e51f ac/surface: don't oversize surf_size 
Yet another iteration on the same YUV surfaces.

The change from 87ecfdfbf0 has 2 odd things:
* it's using MAX2(original value, new value) but the point of updating
  surf_slice_size / surf_size is to make it correct relative to the new
  value of surf_pitch
* it's multiplying surf_pitch (= number of elements per row) by height (ok)
  by surf->bpe (= number of bytes per element) by surf->blk_w (= number of
  "horizontal" pixels in an element) so the end unit doesn't make sense.

Fix this by computing a reasonnable value based on unit: the surf_slice_size
is the number of elements per row (surf_pitch) x number of bytes per element
(bpe) x number of rows.

This makes the expected size correct and thus fixes users of eglCreateImageKHR,
like the issue #6131.

I tested a bunch of gst pipelines and ffmpeg scripts on various files I have
and didn't notice any issues (on gfx10.3 and gfx9).

Fixes: 87ecfdfbf0 ("ac/surface: adapt surf_size when modifying surf_pitch")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6131
Acked-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26693>
 2024-01-02 14:32:05 +01:00
Ruijing Dong 434a53ebbe radesonsi/vcn add qp_map definition 
This is for enabling ROI (region of interest)
feature in VAAPI interface. It will support
both CQP and rate control mode.

Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26659>
 2023-12-15 14:06:34 +00:00
Marek Olšák 390f26eefb ac,radeonsi: require DRM 3.27+ (kernel 4.20+) same as RADV 
The only major change is the code removal of the legacy BO list path
in the winsys, which required switching "debug_all_bos" to the new path.

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Daniel Schürmann f5bdc46a57 amd: rename max_wave64_per_simd -> max_waves_per_simd 
These are hard limits and don't depend on wave size.
Accordingly, also update the usage in order to avoid
reporting unreasonable occupancy.

Totals from 192 (0.24% of 79330) affected shaders:

MaxWaves: 5814 -> 3072 (-47.16%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26521>
 2023-12-11 10:39:50 +00:00
Marek Olšák 2f281b39ab ac/gpu_info: fix printing radeon_info after adding VPE 
Fixes: 3ec397819e - amd: add new hardware ip for vpe

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26307>
 2023-12-09 00:05:28 +00:00
Marek Olšák 00dd4d400e ac,radeonsi: rename pos_inputs -> fragcoord_components 
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26307>
 2023-12-09 00:05:27 +00:00
Yonggang Luo 72e30c8853 treewide: Avoid use align as variable, replace it with other names 
align is a function and when we want use it, the align variable will shadow it
So replace it with other names

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25997>
 2023-12-07 02:30:53 +00:00
Samuel Pitoiset b2a37b4304 ac/nir: add an option to skip MRTZ exports in ac_nir_lower_ps() 
On RDNA3, alpha to coverage needs to be exported through MRTZ when
depth, stencil or samplemask are also exported. This option will allow
us to export MRTZ from PS epilogs instead of the main FS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26413>
 2023-12-06 11:49:31 +00:00
Marek Olšák 7ffb65f935 ac: add an IB parser that gathers context rolls 
This is an important performance bottleneck analysis tool.

Try it with radeonsi: AMD_ROLLS=filename app

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26349>
 2023-12-01 01:15:55 +00:00
Marek Olšák f0cb8852a4 ac: move the IB parsers into ac_parse_ib.c 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26349>
 2023-12-01 01:15:55 +00:00
Marek Olšák c5fe2780e6 ac: rename ac_parse_ib.c -> ac_ib_parser.c 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26349>
 2023-12-01 01:15:55 +00:00
Peyton Lee 3ec397819e amd: add new hardware ip for vpe 
Signed-off-by: Peyton Lee <peytolee@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25713>
 2023-12-01 00:23:38 +00:00
Rhys Perry 5bc27e80c9 ac/nir: fix 32-bit offset global access optimization 
Since 38cff03e58 ("radv: use nir_lower_conv64"), u2u64(a) is replaced
with pack_64_2x32_split(a, 0).

fossil-db (navi31):
Totals from 1203 (1.52% of 79330) affected shaders:
MaxWaves: 33685 -> 33813 (+0.38%)
Instrs: 1407031 -> 1374689 (-2.30%); split: -2.32%, +0.02%
CodeSize: 7088652 -> 6917320 (-2.42%); split: -2.43%, +0.01%
VGPRs: 69276 -> 68988 (-0.42%); split: -0.43%, +0.02%
SpillSGPRs: 982 -> 977 (-0.51%); split: -0.92%, +0.41%
Latency: 12536511 -> 12451605 (-0.68%); split: -0.94%, +0.27%
InvThroughput: 2456803 -> 2431241 (-1.04%); split: -1.09%, +0.05%
VClause: 27624 -> 27832 (+0.75%); split: -1.88%, +2.64%
SClause: 31757 -> 32702 (+2.98%); split: -0.53%, +3.51%
Copies: 90923 -> 91238 (+0.35%); split: -1.47%, +1.81%
Branches: 25127 -> 25128 (+0.00%); split: -0.00%, +0.01%
PreSGPRs: 46025 -> 46068 (+0.09%); split: -0.53%, +0.62%
PreVGPRs: 53944 -> 53488 (-0.85%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26402>
 2023-11-30 21:50:21 +00:00
Rhys Perry 10ba06960f ac/nir: ignore 8/16-bit global access offset 
This was found by inspection, I'm not sure it can even happen.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26402>
 2023-11-30 21:50:21 +00:00
Boyuan Zhang d07517d19f radeonsi: add new interface to handle multi slice reflist 
Add new flag and buffer to handle multi slice reflist case for hevc.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26081>
 2023-11-30 08:39:31 -05:00
Alyssa Rosenzweig d50d9eccad ac,radv,radeonsi: use common 1D texture lowering 
It was pulled from ac.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26397>
 2023-11-29 14:04:15 +00:00
Rhys Perry 2d98236dd5 ac/nir: fix partial mesh shader output writes on GFX11 
Fixes dEQP-VK.mesh_shader.ext.smoke.monolithic.mesh_shader_triangle with
nir_opt_combine_stores disabled.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 240e16fc8e ("ac/nir/ngg: Use attribute ring for mesh shader params.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25530>
 2023-11-27 20:11:03 +00:00
Marek Olšák e0a24c7fe0 ac/nir: add kill_layer flag to VS/GS/NGG lowering 
When the framebuffer state has only 1 layer, the output has no effect.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26274>
 2023-11-24 15:37:24 +00:00
Samuel Pitoiset e02a1f0a44 ac/surface: change tile mode for 3D PRT surfaces with bpp < 64 on GFX6-8 
This is loosely based on PAL. This seems to fix 3D PRT support with
RADV on Polaris10. THIN means the tile is a 2D slice. THICK means the
tile is a 3D box.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26260>
 2023-11-20 08:29:19 +01:00
Timur Kristóf fd3cdf28ac ac: Add sdma_version enum and use it for SDMA features. 
The SDMA IP is independent from the GFX IP, so it is technically
wrong to program it based on the GFX level.

This patch adds a new enum for SDMA IP version and uses that
to determine functionality such as compression and sparse
support.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26110>
 2023-11-18 17:11:11 +01:00
Timur Kristóf d09ad16fd4 ac: Remove CIK prefix from SDMA opcodes. 
The vast majority of AMD GPUs (except the very first GCN) have
the same SDMA packet format, so let's just call it SDMA instead
of CIK_SDMA.

(And leave the oldest GPUs with SI_SDMA as they are now.)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26110>
 2023-11-18 17:11:00 +01:00
Timur Kristóf 6413b860c4 ac: Rename SDMA max copy size macros to reflect SDMA version. 
This naming is more accurate and closer to the HW.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26110>
 2023-11-18 17:10:56 +01:00
Rhys Perry a279767424 ac/gpu_info: update conformant_trunc_coord comment 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25911>
 2023-11-17 15:15:28 +00:00
Samuel Pitoiset ec82b42944 radv: add a missing async compute workaround for Tonga/Iceland 
After digging into PAL code again, I figured that Tonga/Iceland are
both affected by a hw bug related to async compute dispatches.

The solution is to change the "threadgroup" dimension mode to the
"thread" dimension mode unconditionally.

This should fix a bunch of issues related to RADV_DEBUG=nocompute on
these GPUs.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7551
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6334
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4679
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26207>
 2023-11-16 11:37:43 +00:00
Vinson Lee 904015ae85 ac/surface/tests: Remove duplicate variable block_size_bits 
Fix defect reported by Coverity Scan.

Evaluation order violation (EVALUATION_ORDER)
write_write_typo: In block_size_bits = block_size_bits = ((surf.u.gfx9.swizzle_mode >= ADDR_SW_256KB_Z_X) ? 18 : 16),
block_size_bits is written twice with the same value.

Fixes: 44eaf50a34 ("ac/surface/tests: cosmetic changes")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26160>
 2023-11-15 19:22:06 -08:00
Chia-I Wu c905aeb4e4 ac: be careful with stencil_offset override 
Check surf->has_stencil first to avoid trashing surf->u.gfx9.color.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26106>
 2023-11-15 20:29:03 +00:00
Friedrich Vock 03a7cb2618 ac/gpu_info: Manually compute L3 size for Navi33 
The firmware reports no MALL cache being present, which is wrong. We
later depend on correct L3 cache size values for choosing the attribute
ring size, so fall back to manually computing the size.

Fixes: 355242f055 ("ac/gpu_info: adjust attribute ring size for gfx11")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26147>
 2023-11-15 14:09:50 +00:00
Hans-Kristian Arntzen f69863fd5a radv/radeonsi: Forward correct GPU instance to umr. 
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24578>
 2023-11-13 13:37:27 +00:00
Samuel Pitoiset aa75538674 ac/rgp: update dumping queue event records to the capture 
GPU timestamps are emitted by the GPU to a BO with CPU-access which
means the driver needs to read them back when the submission is done.

Fix this by passing a pointer to that BO, like some other records.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22779>
 2023-11-13 08:53:09 +00:00
Marek Olšák e7c8d32bfc ac/gpu_info,llvm: trivial cosmetic changes 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26095>
 2023-11-07 19:27:43 +00:00
Marek Olšák b74d849a29 ac/gpu_info: split has_set_pairs_packets into context and sh flags 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26095>
 2023-11-07 19:27:43 +00:00
Alyssa Rosenzweig cc3f20ca6c nir: Also gather decomposed primitive count 
Simple extension.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26056>
 2023-11-07 00:05:54 +00:00
Marek Olšák 44eaf50a34 ac/surface/tests: cosmetic changes 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26055>
 2023-11-05 12:39:42 -05:00
Marek Olšák dfcc7f83a4 ac/surface: cosmetic changes 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26055>
 2023-11-05 12:39:42 -05:00
Marek Olšák 355242f055 ac/gpu_info: adjust attribute ring size for gfx11 
these are better numbers

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26055>
 2023-11-05 12:36:52 -05:00
Marek Olšák bd57630885 ac: add missing gfx11.5 bits 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26055>
 2023-11-05 12:34:55 -05:00
Samuel Pitoiset e18c4bca31 ac/debug: add a helper to print GPUVM fault protection status 
This basically prints the same info as dmesg.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25855>
 2023-10-30 08:10:22 +00:00
Samuel Pitoiset 4f8a225387 ac/gpu_info: remove bogus assertion about number of COMPUTE/SDMA queues 
For example, my polaris10 GPU now returns 3 compute queues.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25876>
 2023-10-26 13:44:21 +00:00
Yonggang Luo 43715516fc treewide: Merge num_mesh_vertices_per_primitive and u_vertices_per_prim into mesa_vertices_per_prim 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25880>
 2023-10-26 09:35:04 +00:00
Samuel Pitoiset bdc62108be amd: add has_gpuvm_fault_query 
Whether the kernel allows to query the last GPUVM fault.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238>
 2023-10-25 15:29:22 +00:00
David Rosca 9b4fccf4b3 radeonsi/vcn: Add encode support for H264 B-frames 
Tested with ffmpeg and gstreamer vah264enc.

References to B-frames (b_depth/b-pyramid) not supported.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25565>
 2023-10-25 01:03:58 +00:00
Timur Kristóf b442de86c1 radv: Support SDMA in radv_cp_wait_mem. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25833>
 2023-10-24 23:12:45 +00:00
Rhys Perry 773d35d25e ac/nir: implement mesh shader multi-row export 
Unlike AMDVLK, this has separate loops for attribute stores and exports,
so that the stores from different rows can overlap.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>
 2023-10-24 21:36:07 +00:00
Rhys Perry c29d8a9e68 ac/nir,radv: pass workgroup size to ac_nir_lower_ngg_ms 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>
 2023-10-24 21:36:06 +00:00
Rhys Perry c300a496ea ac/nir: add emit_ms_outputs helper 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>
 2023-10-24 21:36:06 +00:00
Rhys Perry 23cb0b00db radv: implement mesh shader gs_fast_launch=2 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>
 2023-10-24 21:36:06 +00:00
Rhys Perry c63ac28014 ac/nir: optimize mesh shader local_invocation_index 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>
 2023-10-24 21:36:06 +00:00
Rhys Perry cddbe9a4c2 ac/nir: implement mesh shader gs_fast_launch=2 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>
 2023-10-24 21:36:06 +00:00
Rhys Perry 75bc2e7149 ac/nir: refactor mesh vertex/primitive export 
To prepare for row export, move them into helpers with index and row
parameters.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>
 2023-10-24 21:36:06 +00:00
Rhys Perry 24431419ce ac/nir: remove dead code 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>
 2023-10-24 21:36:06 +00:00