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169063 Commits

Author SHA1 Message Date
Jianxun Zhang 1b8a07095d intel/isl: Add Gfx 12.x RC_CCS_CC into modifier scores 
Add RC_CCS_CC drm modifiers of TGL, DG2 and MTL into
the list with a higher score than RC_CCS modifiers.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25651>
 2023-12-19 13:57:16 +00:00
Jianxun Zhang ed45f95b51 intel/vulkan: Add COMPRESSED_CLEAR state in layout translation 
The added state is for RC_CCS_CC modifiers that support fast
clear.

Fix:
vkcube: ../src/intel/vulkan/anv_image.c:2686: anv_layout_to_aux_state:
Assertion `!"" "unexpected isl_aux_state"' failed.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25651>
 2023-12-19 13:57:16 +00:00
Jianxun Zhang 24b4f9c3ba intel/vulkan: Update comment of a workaround of modifiers 
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25651>
 2023-12-19 13:57:16 +00:00
Jianxun Zhang 12f0715787 intel/vulkan: Correct a comment about an offset in fast clear 
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25651>
 2023-12-19 13:57:16 +00:00
Jianxun Zhang 9c5a28d919 intel/vulkan: Use the last 2 dwords of clear color struct 
Refer to the comments added in the code, we now take the
last 2 dwords in the clear color struct to store the fast
clear type and the first compression state.

Suggested by Nanley Chery <nanley.g.chery@intel.com>

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25651>
 2023-12-19 13:57:16 +00:00
Jianxun Zhang 82f47acb16 intel/vulkan: Remove private binding on fast clear region 
To support modifiers with fast clear color, the region
should be able to export along with main surface, so we
remove the private binding in such case.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25651>
 2023-12-19 13:57:16 +00:00
Jianxun Zhang 91a10251b9 intel/vulkan: Import aux state tracking buffer 
Pass down the offset of aux state tracking buffer
of an imported image from the layout provided from
the application.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25651>
 2023-12-19 13:57:16 +00:00
Jianxun Zhang 1d5326b30e intel/vulkan: Specify offset when creating aux state tracker 
Allow aux state tracking buffer created with different offsets,
in order to support importing images with drm modifiers. We
will always need to calculate the size of an imported fast
clear region because Vulkan spec defines:
VUID-VkImageDrmFormatModifierExplicitCreateInfoEXT-size-02267
For each element of pPlaneLayouts, size must be 0

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25651>
 2023-12-19 13:57:16 +00:00
Jianxun Zhang a26d62df6b intel/vulkan: Allow modifiers supporting fast clear 
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25651>
 2023-12-19 13:57:16 +00:00
Jianxun Zhang ab6f1b1d57 intel/vulkan: Report clear color in subresource layout 
To support drm modifiers with fast clear features, this
change reports the layout of the region back to application.
Because it tracks all levels and layers in that plane, the
whole region is reported back regardless the level and
layer are being queried.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25651>
 2023-12-19 13:57:16 +00:00
Jianxun Zhang f280b6e8d5 intel: Move mod_plane_is_clear_color() into isl 
We are going to reuse this helper in anv driver and
also rename it.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25651>
 2023-12-19 13:57:16 +00:00
Jianxun Zhang 3b885926e9 intel/isl: Add a debug option to override modifer list 
Developers can limit supported modifers to a single
modifier provided in INTEL_MODIFIER_OVERRIDE environment
variable for debug purposes. For example, setting it
makes Vulkan CTS only run modifier tests against the
specified modifier instead of all modifiers in production
code.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Acked-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25651>
 2023-12-19 13:57:16 +00:00
Sviatoslav Peleshko 8f8cde4c60 intel/fs: Don't optimize DW*1 MUL if it stores value to the accumulator 
Fixes: a8b86459 ("i965/fs: Optimize a * 1.0 -> a.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9570
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25710>
 2023-12-19 13:32:23 +00:00
Sviatoslav Peleshko a6459e0f7b nir/loop_analyze: Don't test non-positive iterations count 
Testing negative iterations count makes no sense, and can cause issues
when the unsigned type is used.
Testing 0 iterations is already covered with
will_break_on_first_iteration, so it can be skipped too.

Fixes: 6772a17a ("nir: Add a loop analysis pass")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9913
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26173>
 2023-12-19 12:53:52 +00:00
David Heidelberg dd144962c2 ci/broadcom: separate HW definition from SW 
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26720>
 2023-12-19 12:34:09 +00:00
Juan A. Suarez Romero ef4f33b661 ci/v3d/vc4: remove explicit modules to load 
These are now loaded through the initramfs image.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26720>
 2023-12-19 12:34:09 +00:00
José Expósito d913927fe9 egl/glx: fallback to software when Zink is forced and fails 
When `MESA_LOADER_DRIVER_OVERRIDE` is set to `zink` and the display
initialization fails, fallback to software rendering.

The error was reported in #10123 and it can be reproduced with:

    $ MESA_LOADER_DRIVER_OVERRIDE=zink eglinfo

`eglinfo` would crash in `dri2_display_release()` because of
`assert(dri2_dpy->ref_count > 0)`.

After bisecting the error to commit 8cd44b8843 ("egl/glx: add
autoloading for zink"), I found out that, before this change, the
display was set to initialized even when `_eglDriver.Initialize(disp)`
failed:

    disp->Options.Zink = env && !strcmp(env, "zink");
    // disp->Options.Zink is true

    if (!_eglDriver.Initialize(disp)) {
       [...]
       // Zink initialization has failed at this point
       // However, success is set to true:
       bool success = disp->Options.Zink;
       if (!disp->Options.Zink && !getenv("GALLIUM_DRIVER")) {
          [...]
       }
       // Software initialization is ignored because success is true
       if (!success) {
          [...]
       }
    }

    // The display is set as initialized even though it shouldn't
    disp->Initialized = EGL_TRUE;

Resolves: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10123
Fixes: 8cd44b8843 ("egl/glx: add autoloading for zink")
Signed-off-by: José Expósito <jexposit@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26184>
 2023-12-19 11:59:49 +00:00
Kenneth Graunke 49b8ccbcdc intel/fs: Drop opt_register_renaming() 
In the past, multiple writes to a single register were pretty common,
but since we've transitioned to NIR, and leave the IR in SSA form for
everything not captured in a phi-web, the pattern of generating new
temporary registers at each step is a lot more common.

This pass isn't nearly as useful now.  Across fossil-db on Alchemist,
this affects only 0.55% of shaders, which fall into two cases:

- Coarse pixel shading pixel-X/Y setup.  There are a few cases where
  we write a partial calculation into a register, then have a second
  instruction read that as a source and overwrite it as a destination.
  While we could use a temporary here, it doesn't actually help with
  register pressure at all, since there's the same amount of values
  live at both instructions regardless.  So while this pass kicks in,
  it doesn't do anything useful.

- Geometry shader control data bits (5 shaders total).  We track masks
  for handling EndPrimitive in a single register across the program,
  and apparently in some cases can split the live range.  However, it's
  a single register...only in geometry shaders...which use EndPrimitive.
  None of them appear to be in danger of spilling, either.  So this tiny
  benefit doesn't seem to justify the cost of running the pass.

So, just throw it out.  It's not worth keeping.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26343>
 2023-12-19 11:07:18 +00:00
Kenneth Graunke 866205d4d7 intel/fs: Allow omitting the destination of A64 untyped atomics 
This works exactly the same as the other atomics and the missing
destination is already handled in lower_logical_sends().

Only affects 2 shaders in fossil-db (in Cyberpunk 2077), but the
cycle count drops by 4.23%.  Nice to have in place at any rate.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26343>
 2023-12-19 11:07:18 +00:00
Vignesh Raman 2487e18d4e ci: bare-metal: poe: Create strutured logs 
Use the CustomLogger class and CLI tool to create strutured logs
for poe scripts which are used by broadcom and nouveau jobs.
Renamed stage lint to code-validation and added python-test job
which runs the tests for structured and customer logger to ci.

Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25179>
 2023-12-19 10:09:35 +00:00
Samuel Pitoiset b5153693cc radv: move image view related code to radv_image_view.c 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26713>
 2023-12-19 09:48:35 +00:00
Samuel Pitoiset 1db86d93f2 radv: move buffer view related code to radv_buffer_view.c 
More code isolation.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26713>
 2023-12-19 09:48:35 +00:00
Samuel Pitoiset 02282fe482 radv: move SI_GS_PER_ES to radv_constants.h 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26713>
 2023-12-19 09:48:35 +00:00
Samuel Pitoiset d057cfc8f6 radv: move more shader related declarations to radv_shader.h 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26713>
 2023-12-19 09:48:35 +00:00
Samuel Pitoiset 0481723cf0 radv: move radv_depth_clamp_mode to radv_cmd_buffer.c 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26713>
 2023-12-19 09:48:35 +00:00
Samuel Pitoiset c0d7ef1e58 radv: move more descriptor related declarations to radv_descriptor_set.h 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26713>
 2023-12-19 09:48:34 +00:00
Samuel Pitoiset a080390c3c radv: move radv_image_is_renderable() to radv_image.c 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26713>
 2023-12-19 09:48:34 +00:00
Samuel Pitoiset 8a5106f91a radv: move RADV_HASH_SHADER_xxx flags to radv_pipeline.c 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26713>
 2023-12-19 09:48:34 +00:00
Samuel Pitoiset 9d15390635 radv: move meta declarations to radv_meta.h 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26713>
 2023-12-19 09:48:34 +00:00
Samuel Pitoiset 939936a328 radv: remove radv_get_tess_output_topology() declaration 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26713>
 2023-12-19 09:48:34 +00:00
Jesse Natalie 51bf1b26d0 libgl-gdi: Update wgl test to set debug flags needed for tests 
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26744>
 2023-12-18 23:49:28 +00:00
Jesse Natalie 8c88cc8630 libgl-gdi: Update wgl test to use a 32bit framebuffer 
Otherwise, the d3d12 driver doesn't use a DXGI swapchain

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26744>
 2023-12-18 23:49:28 +00:00
Jesse Natalie 325fb6e26b d3d12: Only destroy the winsys during screen destruction, not reset 
Fixes: 81c8e89f ("d3d12: Fix screen->winsys leak in d3d12_screen")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26744>
 2023-12-18 23:49:28 +00:00
Jesse Natalie ff9868c569 d3d12: Add a debug flag to opt out of singleton behavior 
For testing, it can be useful to observe behaviors on the singleton
device by just having the test also just use D3D12CreateDevice

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26744>
 2023-12-18 23:49:28 +00:00
Jesse Natalie bed69133cd util: Re-implement getenv for Windows 
On Windows, the C runtime maintains an environment variable cache for
getenv. But apps and drivers are free to statically link the C runtime,
so you might get different environment variable caches between components.
Specifically, a test trying to putenv to update the environment won't have
its update reflected by the driver if the CRT is statically linked, unless
we go to the Win32 API directly.

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26744>
 2023-12-18 23:49:28 +00:00
Yonggang Luo a0b7ae859f osmesa: Fixes building osmesa.c on windows 
Fixes: 5bf68ab701 ("osmesa: Make osmesa.h compatible with Windows SDK's GL.h")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Ack-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26674>
 2023-12-18 23:35:17 +00:00
Ruijing Dong 8bcf33cdc1 radeonsi/vcn: ROI capability value initialization. 
It needs to initialize the cap value to
avoid causing confusion.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26741>
 2023-12-18 23:07:25 +00:00
David Heidelberg 148230db05 ci/freedreno: downgrade whole Adreno 6xx series, incl. zink-a618 jobs 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26745>
 2023-12-18 21:32:48 +01:00
Konstantin Seurer 662f86c533 radv/bvh: Stop emitting leaf nodes inside the encoder 
Avoids unnecessary copies.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26725>
 2023-12-18 19:17:21 +00:00
Konstantin Seurer 8fca54a754 radv: Add more offsets acceleration_structure_layout 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26725>
 2023-12-18 19:17:21 +00:00
Michel Dänzer f0594915e6 glx: Handle IGNORE_GLX_SWAP_METHOD_OML regardless of GLX_USE_APPLEGL 
Avoids tons of

 WARNING: unknown fbconfig attribute from server: tag 0x8060 value 0x8063

messages with LIBGL_DEBUG=verbose.

Fixes: e64ab3e4a9 ("glx: Delete support for GLX_OML_swap_method.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26685>
 2023-12-18 17:52:09 +00:00
Michel Dänzer 9548f969bd gallium/dri: Return __DRI_ATTRIB_SWAP_UNDEFINED for _SWAP_METHOD 
In contrast to __DRI_ATTRIB_SWAP_EXCHANGE, this is compatible with Mesa
< 23.3 on the client side.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10080
Fixes: e64ab3e4a9 ("glx: Delete support for GLX_OML_swap_method.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26685>
 2023-12-18 17:52:09 +00:00
Faith Ekstrand 290d958c63 nak/nir: Set nir_lower_io_lower_64bit_to_32 for varyings 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>
 2023-12-18 17:35:29 +00:00
Faith Ekstrand a9fb7b0280 nak: Implement b2f64 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>
 2023-12-18 17:35:29 +00:00
Faith Ekstrand 26d649f120 nak: Fix nir_op_f2f64 
We were only allocating one register

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>
 2023-12-18 17:35:29 +00:00
Faith Ekstrand 7ced1d3648 nak: Wire up 64-bit nir_op_fadd/ffma/fmul and comparisons 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>
 2023-12-18 17:35:28 +00:00
Faith Ekstrand 995eea8d04 nak: Split fmul/ffma handling from fmulz/ffmaz 
They're enough of a special case that things are going to get confusing
when we start adding bit sizes to fmul/ffma.  Let's make them a special
case so they can assert all their things.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>
 2023-12-18 17:35:28 +00:00
Faith Ekstrand 1236c5d4f1 nak: Add the rest of the double-precision ops 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>
 2023-12-18 17:35:28 +00:00
Faith Ekstrand 2f899f44eb nak: Rework encoding of ALU instructions on SM70+ 
The main change here is that we match on src2 first and then src1.  This
lets make some of the src2 code common because src2 never moves around
if it's a register.  This change also has another subtle effect: None
sources now work everywhere.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>
 2023-12-18 17:35:28 +00:00
Faith Ekstrand c53f562d1a nak: OpDAdd doesn't have saturate 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26743>
 2023-12-18 17:35:28 +00:00