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154638 Commits

Author SHA1 Message Date
Simon Perretta eb65c4be88 pvr: Add support for WOP 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
 2023-02-24 11:29:48 +00:00
Simon Perretta 432fea181d pvr: Add support for emitpix 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
 2023-02-24 11:29:48 +00:00
Simon Perretta bdbd69edb8 pvr: Add support for validating modifier combos 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
 2023-02-24 11:29:48 +00:00
Simon Perretta 8ef839374e pvr: Add support for sample instructions 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
 2023-02-24 11:29:48 +00:00
Simon Perretta 1c11f1afbd pvr: Add support for fitr.pixel 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
 2023-02-24 11:29:48 +00:00
Simon Perretta 0ce53b002f pvr: Amend subarray ownership code 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
 2023-02-24 11:29:48 +00:00
Simon Perretta af0685d05e pvr: Add NIR pass to lower vars to SSA 
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21474>
 2023-02-24 11:29:48 +00:00
Sviatoslav Peleshko 07b57deea2 anv: Move WA MEDIA_VFE_STATE after stalling PIPE_CONTROL 
Fixes: bc612536 ("anv: Emit a dummy MEDIA_VFE_STATE before switching from GPGPU to 3D")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6172
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21472>
 2023-02-24 10:08:43 +00:00
Friedrich Vock c0c911d9ba mesa: Report GL_SHADER_BINARY_FORMAT_SPIR_V as supported 
GL_ARB_gl_spirv introduced it, but its corresponding format was never listed in GL_SHADER_BINARY_FORMATS.

Fixes: 5bc03d25 ("mesa: implement SPIR-V loading in glShaderBinary")
Closes: #7644
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19559>
 2023-02-24 09:39:17 +00:00
Pierre-Eric Pelloux-Prayer 2b655e267e radeonsi: fix incorrect vgpr indices in the ps_prolog 
In monolithic PS shaders, we need to account for PERSP_PULL_MODEL even
if we don't use it; si_get_ps_prolog_key already does the same thing
to determine color_interp_vgpr_index.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8280
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21483>
 2023-02-24 09:17:20 +00:00
Pavel Ondračka a8e1e5b5c2 r300: simplify KILL transformation 
We had some special cases before when we could actually get some IFs on
R300 with VDPAU. Now that VDPAU is gone and everything goes through
ntt, we don't have to worry anymore. Remove the complicated logic and
just always transform KILL into KIL none.-1

No shader-db change on RV530 or RV370.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21503>
 2023-02-24 08:59:53 +00:00
Emma Anholt fc0f694676 ci/zink: Add a glx flake on anv 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
 2023-02-24 07:31:36 +00:00
Emma Anholt ae0e1eb0af ci/hasvk: Add a synchronization flake. 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
 2023-02-24 07:31:36 +00:00
Emma Anholt 0b976dee49 ci/zink+turnip: Disable flaky minetest trace. 
random 1-pixel changes sometimes.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
 2023-02-24 07:31:36 +00:00
Emma Anholt 2a7debd1ca ci/turnip: Drop the #8219 xfail. 
It hasn't showed up in the last couple runs, the other test is no longer
showing up in the caselist so the fail isn't triggered.  Bug is still
there, though.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
 2023-02-24 07:31:36 +00:00
Emma Anholt 0cc34b7bb9 ci/freedreno: Drop a530 piglit_gl coverage. 
It hasn't worked in a long time -- the board gets wedged 20 minutes in and
then we reboot it and try again until failure.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
 2023-02-24 07:31:36 +00:00
Emma Anholt be32dba99c ci/etnaviv: Drop one more gc7000 xfail. 
Looks like I missed it in the last full-run update.

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21366>
 2023-02-24 07:31:36 +00:00
Sviatoslav Peleshko 4bf38f5652 anv: Handle all fields in VkAccelerationStructureBuildRangeInfoKHR 
Add handling of primitiveOffset and firstVertex.

Fixes: f3ddfd81 ("anv: Build BVHs on the GPU with GRL")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8296
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21342>
 2023-02-24 07:08:05 +00:00
Caio Oliveira 070f042e10 spirv: Implement SPV_KHR_subgroup_rotate 
Map SpvOpGroupNonUniformRotateKHR to nir_intrinsic_rotate.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19797>
 2023-02-24 06:33:51 +00:00
Caio Oliveira 3328714295 nir/lower_subgroups: Add option lower_rotate_to_shuffle 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19797>
 2023-02-24 06:33:51 +00:00
Caio Oliveira e40b1df432 nir: Add nir_intrinsic_rotate 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19797>
 2023-02-24 06:33:51 +00:00
Pavel Ondračka a06ab9849d r300: drop VDPAU support 
There is no UVD and the mpeg2 shader-based decoding is broken and doesn't
lead to CPU savings anyway. VDPAU output works, but there is no real
benefit so just disable VDPAU altogether so we can clean the backend a
bit and also open a way to potentially drop the mpeg2 deconding altogether
from the fronted.

Acked-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20524>
 2023-02-24 06:04:32 +00:00
Mike Blumenkrantz 865e9311a2 zink: utilize copy box tracking to avoid barrier emission for buf2img copies 
this should reduce synchronization during e.g., miplevel population

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>
 2023-02-24 05:27:31 +00:00
Mike Blumenkrantz 4ad64552b8 zink: add a util function for optimizing TRANSFER_DST image barriers 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>
 2023-02-24 05:27:31 +00:00
Mike Blumenkrantz fa6e6545b1 zink: add some tracking for copy box regions 
this enables tracking per-miplevel pipe_boxes for copy operations that
can then be used to avoid emitting barriers for successive copy operations
without overlapping regions

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>
 2023-02-24 05:27:31 +00:00
Mike Blumenkrantz 935184ca44 util/box: add intersection test functions for 1d/3d 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21397>
 2023-02-24 05:27:31 +00:00
Caio Oliveira 8f3d0141de anv, hasvk: Align workaround address to 32B 
Not necessary but, all things being equal, be consistent with Iris.

Now that intel_debug_write_identifiers() already add the padding,
there's no need to include extra "+ 8" to the offset.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21479>
 2023-02-24 04:57:40 +00:00
Caio Oliveira a4a0417263 iris, crocus: Align workaround address to 32B 
The workaround address is used as a source for push constants when
there's no resource available, that address must be 32B aligned.

This fixes invalid address being used for buffers in
3DSTATE_CONSTANT_* packets.

Now that intel_debug_write_identifiers() already add the padding,
there's no need to include extra "+ 8" to the offset.

Thanks to Xiaoming Wang that contributed to find and fix this issue.

Fixes: 2a4c361b06 ("iris: add identifier BO")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21479>
 2023-02-24 04:57:40 +00:00
Caio Oliveira ea0ec8c562 intel: Add extra zeros at the end of debug identifiers 
Add at least a full aligned uint64_t of zero padding at the end
to make the identifiers easier to spot.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21479>
 2023-02-24 04:57:40 +00:00
David Heidelberg 387d131f96 ci/llvmpipe: add flake timeout for rusticl program@execute@builtin@builtin-float-sincos-1.0 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21510>
 2023-02-24 04:37:49 +00:00
Sil Vilerino 9490633723 d3d12: Fix VP9 Decode - Checking 0xFF instead of 0x7F for invalid frame_ref[i].Index7Bits 
Fixes: c8e8ce8359 ("d3d12: Add VP9 Decode support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21507>
 2023-02-24 01:49:28 +00:00
Caio Oliveira fb2a6248d2 hasvk: Update driver name in debug information 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21481>
 2023-02-24 00:41:09 +00:00
Bas Nieuwenhuizen ed76833705 radv: Implement & expose VK_EXT_pipeline_library_group_handles. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>
 2023-02-23 22:17:30 +00:00
Bas Nieuwenhuizen d0f7587109 radv: Use group handles based on shader hashes. 
Should be stable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>
 2023-02-23 22:17:30 +00:00
Bas Nieuwenhuizen 913de78731 radv: Use provided handles for switch cases in RT shaders. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>
 2023-02-23 22:17:30 +00:00
Bas Nieuwenhuizen 430170702e radv: Hash group handles as part of RT pipeline key. 
So that we can start varying them  to avoid collisions while keeping
handles stable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>
 2023-02-23 22:17:30 +00:00
Bas Nieuwenhuizen 9eb76ab638 radv: Add helper to hash stages. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21406>
 2023-02-23 22:17:30 +00:00
Mike Blumenkrantz 211ed8745f zink: add debug marker tracing for qbo updates 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21425>
 2023-02-23 21:47:20 +00:00
Mike Blumenkrantz 26aedae568 zink: add ZINK_DEBUG=map 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21425>
 2023-02-23 21:47:20 +00:00
Mike Blumenkrantz 03610a5aab zink: actually hook up ZINK_DEBUG=norp 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21425>
 2023-02-23 21:47:20 +00:00
Rob Clark 9e8450b65c freedreno/crashdec: Disable GALLIUM_DUMP_CPU 
We don't want util_cpu to vomit cpu caps all over the test output.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
 2023-02-23 20:02:26 +00:00
Rob Clark 3f227957d6 freedreno/crashdec: Handle multi-IB prefetching 
Add helper to scan the CP_INDIRECT_BUFFERs, and then work backwards
accounting for data buffered via ROQ prefetch to deduce the actual
SQE position at the time of the crash.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
 2023-02-23 20:02:26 +00:00
Rob Clark ddc4e87438 freedreno/crashdec: Add another prefetch test 
Constructed with an invalid packet (0xdeadd00d) so there is no ambiguity
in the crash location.

This is expected to fail until the next commit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
 2023-02-23 20:02:26 +00:00
Rob Clark 643ee85103 freedreno/crashdec: Refactor crashdec tests 
Simplify the process of adding additional tests.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
 2023-02-23 20:02:26 +00:00
Connor Abbott 7417432a28 freedreno/crashdec: Add prefetch test 
Add a crash where this was seen "in the wild" on a CTS test in
!17943 which requires handling multi-IB prefetching to correctly
location the crash location.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
 2023-02-23 20:02:26 +00:00
Rob Clark 9ececfc6e6 freedreno/cffdec: Fix hang location detection 
We were previously checking only every 8 dwords within the packet.  We
should instead just check if the hang location comes within the packet.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
 2023-02-23 20:02:26 +00:00
Rob Clark 924f264081 freedreno/cffdec: Add helper to parse CP_INDIRECT_BUFFER 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
 2023-02-23 20:02:26 +00:00
Rob Clark c01ac4b583 freedreno/cffdec: Add helper to find next pkt 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
 2023-02-23 20:02:26 +00:00
Rob Clark cb13e24758 freedreno/cffdec: Fix unitialized count for pkt2 
This was causing us to use the size of the previous packet.  Which just
happened to land on a valid packet because pkt2 only followed a
CP_INDIRECT_BUFFER.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
 2023-02-23 20:02:26 +00:00
Connor Abbott 4060cf5772 freedreno/crashdec: Fix apparent off-by-one with ROQ size 
I have multiple examples where this register is too large by one
when comparing to the ROQ read/write pointers in CP_ROQ_*_STAT and the
ROQ data itself, as if it includes the dword most recently read too. I
have an example where it's off by 2 compared to the read pointer, but
the read pointer is also off by 1 itself judging by the SQE program
counter, so that may just be them not getting synchronized. This
off-by-one was getting in the way of figuring out exactly IB2 was being
processed in the next commit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
 2023-02-23 20:02:26 +00:00