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137636 Commits

Author SHA1 Message Date
Danylo Piliaiev e4c582ee71 tu: support VK_EXT_primitive_topology_list_restart 
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14556>
 2022-01-17 15:21:03 +00:00
Rhys Perry d95a0b52e4 nir/unsigned_upper_bound: don't follow 64-bit f2u32() 
Fixes Doom Eternal crash.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 72ac3f6026 ("nir: add nir_unsigned_upper_bound and nir_addition_might_overflow")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14555>
 2022-01-17 10:59:21 +00:00
Lucas Stach 0d65f229c5 egl/dri2: short-circuit dri2_make_current when possible 
If an application calls eglMakeCurrent with the same context and the same
draw and read surfaces as the current ones, there is no need to go
through all the work of unbinding/flushing the old context and binding
the new one.

While the EGL spec is a bit ambiguous here, it seems that the implicit
flush of the outgoing context only needs to be done when the context is
actually changed.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14379>
 2022-01-17 10:32:01 +00:00
Lucas Stach b33ed5406a egl/dri2: remove superfluous flush when changing the context 
The flush of the outgoing GL context, as required by the EGL spec for
eglMakeCurrent and extended by KHR_context_flush_control, is already
performed in the unbindContext call. There is no need to pierce through
the layers and unconditionally call glFlush() here.

Getting the out-fence FD for explicit fencing needs to move behind the
unbindContext, to make sure we are getting the fence for the most
recently flushed commands.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14379>
 2022-01-17 10:32:01 +00:00
Samuel Pitoiset 88f1918919 radv/winsys: fix zero submit if no timeline semaphore support 
Kernels that don't support timeline semaphores also don't support
transferring syncobjs. Use export/import instead.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5845
Fixes: 967fc415fc ("radv: Add new submission path for use by the common sync framework.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14538>
 2022-01-17 08:38:29 +01:00
Emma Anholt f6ffefba3e nir: Apply nir_opt_offsets to nir_intrinsic_load_uniform as well. 
Doing this for ir3 required adding a struct for limits of how much base to
fold in (which NTT wants as well for its case of shared vars), otherwise
the later work to lower to the 1<<9 word limit would emit more
instructions.

The shader-db results are that sometimes the reduction in NIR instruction
count results in the fewer sampler prefetches due to the shader being
estimated to be shorter (dota2, nexuiz):

total instructions in shared programs: 8996651 -> 8996776 (<.01%)
total cat5 in shared programs: 86561 -> 86577 (0.02%)

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14023>
 2022-01-16 19:11:29 +00:00
Emma Anholt b024102d7c freedreno/ir3: Use nir_opt_offset for removing constant adds for shared vars. 
Saves some work in carchase and manhattan31:

instructions in affected programs: 2842 -> 2818 (-0.84%)
nops in affected programs: 1131 -> 1105 (-2.30%)
non-nops in affected programs: 1236 -> 1238 (0.16%)
mov in affected programs: 57 -> 61 (7.02%)
dwords in affected programs: 2144 -> 2150 (0.28%)
cat0 in affected programs: 1195 -> 1169 (-2.18%)
cat1 in affected programs: 151 -> 155 (2.65%)
cat2 in affected programs: 142 -> 140 (-1.41%)
sstall in affected programs: 190 -> 178 (-6.32%)
(ss) in affected programs: 63 -> 63 (0.00%)
systall in affected programs: 532 -> 511 (-3.95%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14023>
 2022-01-16 19:11:29 +00:00
Alyssa Rosenzweig 9645fa9107 agx: Handle discard intrinsics 
Lower to `sample_mask = 0`. Actually that implements a demote... doing
discard correctly probably requires rewriting the shader control flow to
insert a return where necessary...

Also, possibly we should be lowering this in NIR to play nice with
gl_SampleMask writes but that's a problem for when we understand the
hardware better.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
 2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig f248f6623c agx: Add sample_mask instruction 
Sets the output sample mask to a given 8-bit immediate or 16-bit
register. Also used to implement discards, which is my ES2 interest.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
 2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig dcc12656e3 asahi: Route sample mask from shader 
Compiler-controlled bit in the cmdstream.

Some other magic bits are needed for sample mask writes to work
properly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
 2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig 9b57600502 asahi: Rectify confusing XML comment 
The field was split up...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
 2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig 3341abc5d7 asahi: Break out Fragment Parameters word 
What the other 31 bits are for is anyone's guess.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
 2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig fc5a72be2f asahi: Add XML for unknown 0x4a packet 
Enough bits of this packet are known that open-coding hex bytes for it
is annoying. Add some XML correpsonding to what we know.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
 2022-01-16 18:23:28 +00:00
Alyssa Rosenzweig 054c5be102 asahi: Warn when hacks mode is enabled 
I don't want your pesky bug report.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14579>
 2022-01-16 12:43:55 -05:00
Alyssa Rosenzweig 011106640f asahi: Fake more CAPs with dEQP hacks mode 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14579>
 2022-01-16 12:43:55 -05:00
Krunal Patel 13b79266e4 frontend/va: Setting the size of VADRMPRIMESurfaceDescriptor 
Issue: objects[i].size is returned as '0' for all

Root cause: The value of objects.size is hard coded to '0' in
vlVaExportSurfaceHandle()

Fix: Assigning the value by multiplying height and width of the surface

Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14313>
 2022-01-16 15:44:17 +00:00
Krunal Patel 76b7e39354 frontends/va: use un-padded width/height in ExportSurfaceHandle 
Issue: VADRMPRIMESurfaceDescriptor width and height are rounded up to
macroblock size (16).

Rootcause: surf->buffer's width/height are rounded up to macroblock size (16),
so they shouldn't be used here.

Fix: Using surf->templ's width/height instead fixes incorrect surface
dimensions being sent via VADRMPRIMESurfaceDescriptor.

Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14313>
 2022-01-16 15:44:17 +00:00
Alyssa Rosenzweig b8d37eb1bb pan/bi: Schedule around blend shader register clobbering 
By software ABI, a blend shader is permitted to clobber registers
R0-R15. The scheduler needs to be aware of this, to avoid moving a write
to one of these registers past the BLEND itself. Otherwise the schedule
is invalid.

This bug affects GLES3.0, but is rare enough in practice that we had
missed it. It requires a fragment shader to write to multiple render
targets with attached blend shaders, and have temporaries register
allocated to R0-R15 that are not read by the blend shader, but are sunk
past the BLEND instruction by the scheduler. Prevents a regression when
switching boolean representations on:

dEQP-GLES31.functional.shaders.builtin_functions.integer.uaddcarry.uvec4_lowp_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14577>
 2022-01-15 21:51:57 +00:00
Alyssa Rosenzweig 77a1514a37 pan/decode: Disassemble Bifrost quietly 
Although Bifrost clause packing and register assignment is tricky, the
relevant code is by now extensively tested, and there's no remaining
reverse-engineering here. So disassembling verbosely just adds tons of
noise to pandecode without increasing the useful information.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Suggested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
 2022-01-15 11:48:32 -05:00
Alyssa Rosenzweig 58accc995b pan/decode: Don't print Preload twice 
It's already printed in the RSD itself, no need to print it out-of-band
a second time. Removes noise in the pandecode.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
 2022-01-15 11:46:12 -05:00
Alyssa Rosenzweig 330bb2c58b panfrost: Remove FBD pointer on Bifrost XML 
It's a pointer to a thread storage descriptor, not a framebuffer
descriptor. Unlike Midgard, these don't have to alias. The FBD pointer
was unused anyway, so remove it to reduce noise in pandecode dumps.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
 2022-01-15 11:43:40 -05:00
Alyssa Rosenzweig ae9316f812 pan/decode: Decode Valhall surface descriptor 
Instead of incorrectly falling down the Bifrost path.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
 2022-01-15 11:40:14 -05:00
Alyssa Rosenzweig c947a52df4 pan/decode: Add pandecode_dump_mappings 
Add a helper to dump all mapped GPU memory. This is a blunt, seldom
useful instrument ... but when it /is/ useful it's your only option.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
 2022-01-15 11:40:13 -05:00
Alyssa Rosenzweig 861fa2baec pan/decode: Add hexdump helper 
I think I originally wrote this for Asahi? Should probably be moved to
util/...

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
 2022-01-15 11:40:13 -05:00
Alyssa Rosenzweig 6752fcf179 pan/decode: Track mmaps with a red-black tree 
Rather than emulating page tables, poorly, with a hash table, use a
red-black tree and store the intervals directly. This is deterministic
instead of probabilistic, attaining O(log n) performance for n mapped
intervals which is good enough. Unlike the hash table approach, this
allows us to iterate intervals easily.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
 2022-01-15 11:40:13 -05:00
Alyssa Rosenzweig a07473b79d pan/decode: Include addresses for jobs 
Helpful for contextualizing fault pointers.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
 2022-01-15 11:40:13 -05:00
Alyssa Rosenzweig 4af20895c5 pan/decode: Remove hierarchy mask check 
This has never been meaningful.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
 2022-01-15 11:40:13 -05:00
Adam Jackson 01f5fffbc6 mesa: Remove unused src/mesa/x86-64 
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>
 2022-01-15 03:14:00 +00:00
Adam Jackson a686946553 mesa: Remove unused _mesa_set_sampler_{filters,srgb_decode,wrap} 
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>
 2022-01-15 03:14:00 +00:00
Adam Jackson 2db87ad344 mesa: Remove unused _mesa_is_front_buffer_{draw,read}ing 
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>
 2022-01-15 03:14:00 +00:00
Adam Jackson 203df8c264 mesa: Remove unused _mesa_is_alpha_to_coverage_enabled 
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>
 2022-01-15 03:14:00 +00:00
Adam Jackson c630408945 mesa/math: Remove unused m_translate.c 
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>
 2022-01-15 03:14:00 +00:00
Adam Jackson c828490b26 mesa: Remove unused _mesa_delete_nameless_texture 
meta was the last user.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>
 2022-01-15 03:14:00 +00:00
Adam Jackson c1fa6bbecf mesa: Remove unused _mesa_all_varyings_in_vbos 
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>
 2022-01-15 03:14:00 +00:00
Adam Jackson 6e3cd05870 mesa: Remove unused _mesa_convert_colors 
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14545>
 2022-01-15 03:14:00 +00:00
Rob Clark fcb3b87553 freedreno/decode: Handle chip-id 
For cmdstream traces from newer devices, we need to identify the gpu
based on chip-id.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14564>
 2022-01-14 23:17:03 +00:00
Lepton Wu d15021435e driconf: Fix unhandled tags in static conf 
A rule with executable_regexp tag would match every executable
without this fix and force_glsl_extensions_warn would be always
set to true which breaks some dEQP tests.

Fixes: 5740ac3701 ("xmlconfig: Add static driconfig support")

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14562>
 2022-01-14 22:09:50 +00:00
Nanley Chery fe0a6b9606 anv: Don't fill lowered_storage_image_param on SKL+ 
The switch statement in anv_descriptor_data_for_type() shows that this
field isn't used on SKL+.

On XeHP, this avoids assert failures by preventing
isl_surf_fill_image_param() from being called. That function doesn't
expect Tile4 surfaces.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14546>
 2022-01-14 21:47:48 +00:00
Felix DeGrood 1027655810 pps: increase intel.cfg buffer size 
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin 2e3490dd0f iris: utrace/perfetto support 
v2: Fixup gpu_id computation, use minor of /dev/dri/* % 128 since we
    don't know whether we get card0 or renderD128 for instance.
    (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com> (v1)
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin 1d2fea6eae tools/pps: limit intel cfg to 250ms of sampling 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin b462dafbd6 pps: enable anv source in example config file 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin e760c5b37b anv: add perfetto source 
v2: Increase custom stall data (Felix)
    Fixup build (Felix)

v3: Add API enum (Rohan)
    Fixup old comment (Rohan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin b70143f4e3 util/u_process: protect entrypoints for c++ 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin cf9956a8c5 intel/ds: use a per GPU clock ID 
Multi-GPU setups :)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin 61766f9f90 intel/ds: use the right i915_drm.h include location 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin e35a65ae45 intel/ds: don't forget to reset upper dword timestamp read 
This could lead to confusing if the 32bits roll over (every ~6mn or
so).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4ef6698a26 ("intel/ds: drop timestamp correlation code")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin 6eb554a9c7 intel/ds: allow user to select metric set at start time 
Rather than using always the same metric set, let the user choose when
starting the producer with :

  INTEL_PERFETTO_METRIC_SET=RasterizerAndPixelBackend ./build/src/tool/pps/pps-producer

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin 69df00b33b intel/ds: reuse intel_ioctl() 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin cc5843a573 anv: implement u_trace support 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00