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Author SHA1 Message Date
Daniel Stone e3433489f8 ci: Move softpipe issue from fail to flake 
Seems to be caused by environmental differences between runners. Keep it
as a flake until Piglit gets properly fixed.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31833>
 2025-03-28 13:40:07 +00:00
Kenneth Graunke 51c67ad7cf brw: Avoid regioning restrictions for u2u16/i2i16 narrowing conversions 
Cuts 0.83% of instructions on Alchemist in affected fossil-db shaders
(nearly all of which are in parallel-rdp).

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31833>
 2025-03-28 13:40:07 +00:00
Kenneth Graunke 86f8b8860e brw: Use a smaller type for masked sub-32-bit shift values 
Cuts 0.14% of instructions on Alchemist in affected fossil-db shaders
(all of which are in parallel-rdp).

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31833>
 2025-03-28 13:40:07 +00:00
Kenneth Graunke 2e108afb8c brw: Skip unnecessary UNDEFs for comparisons 
For example, SIMD16 W/UW fills an entire REG_SIZE so UNDEF isn't needed.

No change in fossil-db.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31833>
 2025-03-28 13:40:07 +00:00
Kenneth Graunke 771e65b0db brw: Emit UNDEF as needed in SSA-style builder helpers 
Should prevent regressions in a future commit.
fossil-db does show small changes, but it ends up a wash at 0.0%.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31833>
 2025-03-28 13:40:07 +00:00
Kenneth Graunke b89e269a46 brw: Make a helper to emit UNDEF for temporaries containing small types 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31833>
 2025-03-28 13:40:07 +00:00
Daniel Stone f6f085f50a ci: Re-enable trace jobs with updated Piglit 
mesa/piglit!996 fixed up Piglit to allow us to do trace downloads again,
so we can now bring these jobs back. The fdno trace jobs hosted at
Google are still disabled whilst we try to fix their nginx.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34245>
 2025-03-28 13:00:14 +00:00
Mike Blumenkrantz 5d46e2bf3c zink: implement unsynchronized staging uploads for buffers 
similar to images, this comes from unsynchronized texture_subdata
serialization in tc

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34186>
 2025-03-28 12:35:03 +00:00
Mike Blumenkrantz c0b1a23e35 zink: block streaming cached uploads on unsynchronized/persistent maps 
this is broken

Fixes: e63acdd2b7 ("zink: force cached mem for streaming uploads")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34186>
 2025-03-28 12:35:03 +00:00
Daniel Stone d9dffd778a ci/zink: Flake out sparse tests 
These were always-crash in CI, had a comment saying they passed locally,
and now seem to be passing in CI. Just hit it as flake until someone
actually looks into it.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34256>
 2025-03-28 12:06:08 +00:00
Daniel Stone c8c427fb3d ci/amd: Add new radeonsi fail seen in the wild 
Unsure how this slipped in, but it sure is failing consistently.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34256>
 2025-03-28 12:06:08 +00:00
Daniel Stone 9d94e1ed0d etnaviv: Add missing build dependency on generated header 
bindings.h pulls in enums.h, so anything using it needs to depend on
enums.h to avoid spurious build failures.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34256>
 2025-03-28 12:06:08 +00:00
Connor Abbott 8864ee7b0f tu: Fix reported FDM fragment size with multiview 
We were never setting has_multiview. It's not actually necessary anyway,
since we can just do the optimization we were trying to do whenever
num_views is 1 instead.

This doesn't affect the actual fragment size, which was already correct,
only gl_FragSizeEXT.

Fixes: 6f2be52487 ("tu, ir3: Handle FDM shader builtins")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33991>
 2025-03-28 11:35:22 +00:00
Connor Abbott 122f2c422a tu: Fix size of frag_size_ir3 and frag_offset_ir3 driver params 
They are an array, so we have to reserve extra space for extra views.
This bug was being masked by the bug fixed in the next commit.

Fixes: 76e417ca59 ("turnip,ir3/a750: Implement consts loading via preamble")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33991>
 2025-03-28 11:35:22 +00:00
Connor Abbott 9775b33d0f tu: Enable GMEM with layered rendering 
We accidentally forgot to enable it earlier.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34082>
 2025-03-28 11:07:38 +00:00
Connor Abbott 6cadc1baea tu: Fix GMEM offset for multisample layered separate stencil 
Fixes a bug uncovered by CTS when enabling GMEM with layered rendering.

Fixes: def56b531c ("tu: Support GMEM with layered rendering and multiview")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34082>
 2025-03-28 11:07:38 +00:00
Connor Abbott b1dcc9a1d7 tu: Fix binning_possible detection with bin merging 
When bin merging we maximize instead of minimize the VSC pipe size,
which means that we fail when there are too many pipes instead of when
the pipes are too large. This means that we need to calculate
binning_possible differently, and we need to skip
tu_tiling_config_update_pipes() when binning is impossible because
otherwise we will write out-of-bounds.

Fixes: 3fdaad0948 ("tu: Implement bin merging for fragment density map")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34196>
 2025-03-28 09:34:06 +00:00
Danylo Piliaiev abba05e01e tu: Fix NULL deref in trace_end_render_pass 
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34238>
 2025-03-28 08:14:58 +00:00
Samuel Pitoiset 8032f628ad radv: add a helper to emit PM4 commands to a CS 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34223>
 2025-03-28 07:49:04 +00:00
Samuel Pitoiset 498fc42fa9 radv: add a helper to emit a PKT3_COPY_DATA with an immediate 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34223>
 2025-03-28 07:49:04 +00:00
Samuel Pitoiset cd08da2f20 radv/video: slightly change radv_vcn_sq_header() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34223>
 2025-03-28 07:49:04 +00:00
Samuel Pitoiset a2b6b6f1f9 radv: add more helpers to start/stop perfcounters 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34223>
 2025-03-28 07:49:04 +00:00
Samuel Pitoiset 6d3ee9d8ad radv: use radv_cs_write_data_imm() more 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34223>
 2025-03-28 07:49:04 +00:00
Samuel Pitoiset 7affd623c0 radv: slightly change the COND_EXEC for sampling performance counters 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34223>
 2025-03-28 07:49:04 +00:00
Samuel Pitoiset 8d12578989 radv: add a helper to emit SPM muxsel 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34223>
 2025-03-28 07:49:04 +00:00
Samuel Pitoiset f12bf800e3 radv: add a helper to emit indirect buffer for draws/dispatches 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34223>
 2025-03-28 07:49:04 +00:00
Samuel Pitoiset af5cde7107 radv: apply some cosmetic changes for future begin/end CS sequences 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34223>
 2025-03-28 07:49:04 +00:00
Samuel Pitoiset 391da996ed radv: rework the shader pointer emit as macros 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34223>
 2025-03-28 07:49:04 +00:00
Rohan Garg c6757cb8f0 isl: enable CPB compression 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10760
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>
 2025-03-28 04:38:09 +00:00
Rohan Garg 5d2a6b23de anv: separate fast clear handling for compressed CPS 
CPS surfaces are marked as stencil compressed internally and
should use the fast clear depth stencil path for clearing when possible

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>
 2025-03-28 04:38:09 +00:00
Rohan Garg dadd84f5a8 anv: no need to handle transitions for CPB surfaces 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>
 2025-03-28 04:38:09 +00:00
Rohan Garg 80f9b61f02 anv: CPB surfaces that are used as color attachments or for stores cannot be compressed 
This particular scenario indicates that the CPB will be written to using
a fragment shader, disable compression to ensure the correct data is
read back from the surface later.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>
 2025-03-28 04:38:09 +00:00
Rohan Garg ceba312ebd anv,blorp,isl: handle compressed CPS surfaces through the depth stencil hw 
Compressed CPS surfaces operations such as copies and clears need to be
handled through the depth stencil hw to ensure that the aux data is
handled correctly.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>
 2025-03-28 04:38:09 +00:00
Rohan Garg 6f4c23100a anv: refactor add_aux_surface_if_supported to use a common variable 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20741>
 2025-03-28 04:38:09 +00:00
Sagar Ghuge 191d1e7345 intel/compiler: Don't lower 64bit data memory access on LSC 
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34189>
 2025-03-28 03:07:56 +00:00
Jordan Justen f73132f121 intel/dev: Ignore hwconfig difference due to WA 18040209780 
Apparently hwconfig has not implemented this workaround.

This warning was noted on MTL and ADL.

> INTEL_HWCONFIG_TOTAL_GS_THREADS (336) != devinfo->max_gs_threads (312)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34243>
 2025-03-27 14:52:59 -07:00
Jordan Justen cdf95273e1 tools/intel_dev_info: Print hwconfig discrepancies 
Previously we were printing this information whenever the driver
started, but that proved to noisy.

For example, if running thousands of tests, this would cause thousands
of warnings messages to be printed. (Assuming the driver was built in
debug mode.)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34243>
 2025-03-27 14:52:54 -07:00
Jordan Justen bc86fd5b1f intel/dev: Stop checking hwconfig values at driver runtime 
We will move this check into the `intel_dev_info` tool. Unfortunately,
this means we will be much less likely to notice inconsistencies, but
the current strategy has proven to be far too noisy.

For example, if the driver was built in debug mode, then when test
suites are running thousands of tests, the current approach can lead
to thousands of messages being printed.

Closes: mesa/mesa#12141
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34243>
 2025-03-27 14:52:49 -07:00
Daniel Stone df97f243e6 ci: Re-enable Collabora CI 
Now that all our S3 issues have been resolved, let's start running some
tests again.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34244>
 2025-03-27 20:23:15 +00:00
Faith Ekstrand 334a4da5c0 nvk: Bump the conformance version to 1.4.1.3 
I've run this on most of the hardware and there's no new fails.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34127>
 2025-03-27 20:03:44 +00:00
Faith Ekstrand f8409f1892 nak: hsetp2 and dsetp are slower on Volta 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34127>
 2025-03-27 20:03:44 +00:00
Faith Ekstrand c12583fc4b nvk: Mark the push before an indirect push as incomplete 
This fixes dEQP-VK.api.command_buffers.many_indirect_draws_on_secondary
on pre-Turing hardware.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34127>
 2025-03-27 20:03:44 +00:00
Faith Ekstrand 0915b3131f nvk/nvkmd: Add a concept of incomplete pushes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34127>
 2025-03-27 20:03:44 +00:00
Faith Ekstrand cbf87e82e8 nvk: Use the right sample mask for 8x/4pass on Maxwell A 
Fixes: 48898c47bf ("nvk: Rework setup of sample masks")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34127>
 2025-03-27 20:03:44 +00:00
Faith Ekstrand 3354c24169 nouveau/mme/fermi: Don't allow STATE and EMIT on the same op 
Fixes: 162269f049 ("nouveau/mme: Add Fermi builder")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34127>
 2025-03-27 20:03:43 +00:00
Faith Ekstrand 81986a8523 nvk: Disable sparse buffer binding prior to Maxwell B 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34127>
 2025-03-27 20:03:43 +00:00
Faith Ekstrand 35cd6a1d99 nvk: Don't set filterMinmax properties prior to Maxwell B 
We disallow the feature but the CTS still expects the properties to be
false as well.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34127>
 2025-03-27 20:03:43 +00:00
Faith Ekstrand 43d35bb63a nvk: Disable VK_EXT_device_generated_commands on Maxwell A and earlier 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34127>
 2025-03-27 20:03:43 +00:00
Faith Ekstrand 7939331dde nvk: Allocate QMDs from a heap on Maxwell A and earlier 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34127>
 2025-03-27 20:03:43 +00:00
Faith Ekstrand 94787116b1 nvk: Disable VK_EXT_post_depth_coverage on Maxwell A and earlier 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34127>
 2025-03-27 20:03:43 +00:00