Commit Graph

854 Commits

Author SHA1 Message Date
Nicolai Hähnle dfc06d2fac radv: use ac_surface data structures
This is mostly mechanical changes of renaming types and introducing
"legacy" everywhere.

It doesn't use the ac_surface computation functions yet.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:44:09 +10:00
Nicolai Hähnle 543de22f4b radv: rename radeon_surf::bo_{size,alignment} to surf_{size,alignment}
To match radeonsi / ac_surface.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:44:05 +10:00
Nicolai Hähnle 8417c21d0a radv: remove unused RADEON_SURF_HAS_SBUFFER_MIPTREE
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:44:02 +10:00
Nicolai Hähnle e156eaedb4 radv: remove radeon_surf_level::nblk_z
We're not using thick tiling modes, so we can just derive the value
ourselves.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:43:59 +10:00
Nicolai Hähnle 34b7fb47b6 radv: remove radeon_surf_level::dcc_enabled
Like radeonsi; replace with radeon_surf::num_dcc_levels.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:43:56 +10:00
Nicolai Hähnle 59f72e158a radv: remove radeon_surf_level::pitch_bytes
Like radeonsi. This saves memory, and the information can easily be
recomputed on the fly where necessary.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:43:53 +10:00
Nicolai Hähnle a12d288bff radv: add surface helper variable in radv_GetImageSubresourceLayout
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:43:50 +10:00
Nicolai Hähnle 388d36dfd1 radv: fewer than 8 RBs are possible
This fixes the subsequent assertion on Bonaire.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:43:47 +10:00
Nicolai Hähnle e07d5c7296 ac/surface/gfx6: explicitly support S8 surfaces
This is needed by radv for dEQP-VK.renderpass.simple.stencil

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:43:29 +10:00
Dave Airlie 72f0830ecd ac/nir: set workgroup size attribute to correct value.
This ports: 55445ff189 from radeonsi

    radeonsi: tell LLVM not to remove s_barrier instructions

    LLVM 5.0 removes s_barrier instructions if the max-work-group-size
    attribute is not set. What a surprise.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-05 01:37:44 +01:00
Dave Airlie 68c812f699 ac: add new helper function to add a integer target dependent function attr.
This is needed to add the max workgroup size attribute.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-05 01:37:29 +01:00
Dave Airlie 4ba2e6cbfa radv: add external memory support.
This adds support for exporting 2D images, to an
opaque fd.

This implements the:
VK_KHX_external_memory_capabilities
VK_KHX_external_memory
VK_KHX_external_memory_fd

extensions.

These are used by SteamVR, we should work with anv
to decide if we should ship these under an env
var or something.

v2 (Bas): - Don't expose the semaphore ext without implementing it.
          - Only export the capabilities ext as instance ext.
          - Implement radv_GetPhysicalDeviceExternalBufferPropertiesKHX.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
2017-06-05 02:26:43 +02:00
Bas Nieuwenhuizen d515b420dd radv: Add VkPhysicalDeviceIDProperties support.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 02:26:43 +02:00
Bas Nieuwenhuizen d513473cc1 radv: Add support for external queue family.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 02:26:43 +02:00
Dave Airlie a935cd926b radv/formats: reverse how the image format properties KHR2 is handled
This just aligns with how anv does it.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-05 01:03:30 +01:00
Bas Nieuwenhuizen 4415a46be2 radv: Dirty all descriptors sets when changing the pipeline.
Sets could have been ignored during previous descriptor set flush
due to the shader not using them and therefore no SGPR being assigned.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: ae61ddabe8 "radv: move userdata sgpr ownership to compiler side."
2017-06-03 22:24:37 +02:00
Bas Nieuwenhuizen 5fb8bb3065 radv: Set both compute and graphics SGPRS on descriptor set flush.
We clear the descriptors_dirty array afterwards, so the SGPRs for
the other pipeline don't get updated on the flush for that other
draw/dispatch, so we have to make sure we do it immediately.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: ae61ddabe8 "radv: move userdata sgpr ownership to compiler side."
2017-06-03 22:24:37 +02:00
Dave Airlie bcae327469 radv: realign cp dma code with radeonsi
This reworks this code to be like radeonsi, which will make it
easier to add GFX9 support to it in the future.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-02 12:49:11 +10:00
Dave Airlie 745aa17093 radv: bump some base addresses to 64-bits.
For GFX9 these will be needed to be 64-bit, so bump them early,
to avoid it causing any wierdness later.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-02 12:49:01 +10:00
Dave Airlie ad61eac250 radv: factor out eop event writing code. (v2)
In prep for GFX9 refactor some of the eop event writing code
out.

This changes behaviour, but aligns with what radeonsi does,
it does double emits on CIK/VI, whereas previously it only
did this on CIK.

v2: bump the size checks.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-02 12:48:56 +10:00
Dave Airlie 7205431e73 radv: factor out si_emit_wait_fence code.
This code was in a few places, consolidate into one.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-02 12:48:20 +10:00
Bas Nieuwenhuizen af2844116f radv: Revert HTILE reset word to 0xFFFFFFFF.
0x30f regressed mad max.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Fixes: df91abfe5a "radv: Use correct clear words for HTILE."
2017-05-31 23:55:13 +02:00
Bas Nieuwenhuizen 18efb404cf radv: Reserve space for descriptor and push constant user SGPR setting.
flush_compute_state doesn't reserve a large chunk, so these need their own reservation.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
2017-05-29 22:30:39 +02:00
Leo Liu ea79c0440c amd/common: set vcn dec as hw decode as well
Recommit after issue resolved by the previous patch.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-05-29 14:32:29 -04:00
Leo Liu 0abc24723c amd/common: add vcn dec ip info query for amdgpu version 3.17
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-29 14:32:29 -04:00
Emil Velikov 2b6ad89d86 radv: automake: list shared libraries after the static ones
Analogous to previous commit - the compiler can discard xcb + wayland
libs, since there is no user (the static libraries) before it on the
command line.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
2017-05-29 16:42:44 +01:00
Marek Olšák e019ea8f4b radeonsi: move building llvm.SI.load.const into ac_build_buffer_load
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-29 01:52:16 +02:00
Marek Olšák e1942c970f radeonsi: rename readonly_memory -> can_speculate
This is more accurate.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-29 01:52:16 +02:00
Bas Nieuwenhuizen 5cd8ab49fd radv: Also signal fence if vkAcquireNextImageKHR returns VK_SUBOPTIMAL_KHR.
It is a successful return.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-05-29 00:09:45 +02:00
Eric Engestrom 44b29dd7b6 amd/common: add missing libdrm include path
Fixes: de9dd4f9f1 ("ac/radeonsi: move struct radeon_info to ac_gpu_info.h")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-05-26 15:19:55 +01:00
Dave Airlie e1409f7302 Revert "amd/common: add vcn dec ip info query"
This reverts commit 524d4fff9e.

This commit breaks amdgpu on kernels with no DEC IP support.

Caught by the airlied CI system.
2017-05-26 16:36:57 +10:00
Dave Airlie ae1f32915b Revert "amd/common: set vcn dec as hw decode as well"
This reverts commit 50d322be2f.

A previous patch breaks amdgpu on non-vcn decode systems,
but have to revert this first.
2017-05-26 16:36:38 +10:00
Leo Liu 50d322be2f amd/common: set vcn dec as hw decode as well
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-05-25 11:40:20 -04:00
Leo Liu 524d4fff9e amd/common: add vcn dec ip info query
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-05-25 11:40:20 -04:00
Leo Liu c23ffafc50 radeon: rename has_uvd info to has_hw_decode
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-05-25 11:40:20 -04:00
Christian König 5318870f54 winsys/amdgpu: align VA allocations to fragment size v2
BOs larger than the minimum fragment size should have their VA
alignet to at least the fragment size for optimal performance.

v2: drop unused leftover from initial implementation

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-24 10:32:19 +02:00
Bas Nieuwenhuizen b2c5e69942 radv: Add compute HTILE fast clear.
Not really what the fast depth clear does, no matter whether you use
EXPCLEAR or not. Seems the fast clear using the DB HW always touches
the main buffer.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-05-22 20:07:21 +02:00
Bas Nieuwenhuizen df91abfe5a radv: Use correct clear words for HTILE.
Did some RE'ing what several HTILE words give when read from a descriptor
with HTILE compression enabled.

Seems to align with -pro usage for D16 too.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-05-22 20:07:21 +02:00
Bas Nieuwenhuizen 0b26f0ee4f radv: Add queue masks for htile usage determination.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-05-22 20:07:21 +02:00
Bas Nieuwenhuizen 0628580eff radv: Specify semantics of HTILE layout helpers.
And correct implementation to specify only what we support.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-05-22 20:07:21 +02:00
Bas Nieuwenhuizen 62e182acd0 radv: Don't use a separate can_expclear.
We never use EXPCLEAR clears.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-05-22 20:07:21 +02:00
Emil Velikov acf3d2afab configure: check once for DRI3 dependencies
Currently we are having the XCB_DRI3 dependencies duplicated,
partially.

Just do a once-off check and add all of the respective CFLAGS/LIBS
where needed.

As a nice side effect this helps us solve a couple of FIXMEs.

DRI3 is not a thing w/o X11 so disable it in such cases.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2017-05-19 19:44:15 +01:00
Nicolai Hähnle 70215a23c6 ac: add missing extern "C" guards
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-18 11:48:53 +02:00
Nicolai Hähnle 6c01c4b907 ac: add radeon_info::num_{sdma,compute}_rings
Vulkan needs them.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-18 11:48:53 +02:00
Nicolai Hähnle c488bf24ed ac: add radeon_surf::htile_slice_size
Vulkan needs it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-18 11:48:52 +02:00
Nicolai Hähnle 98a2492290 ac_surface: use radeon_info from ac_gpu_info
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-18 11:48:52 +02:00
Nicolai Hähnle 988c866212 ac/radeonsi: move radeon_info initialization to amd/common
v2: update Android.common.mk (Emil)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-18 11:48:52 +02:00
Nicolai Hähnle de9dd4f9f1 ac/radeonsi: move struct radeon_info to ac_gpu_info.h
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-18 11:48:52 +02:00
Nicolai Hähnle 4d6e75776d ac/radeonsi: move some aspects of sanity checking to ac_surface
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-18 11:48:52 +02:00
Nicolai Hähnle 00f466bad9 ac/radeonsi: add ac_compute_surface to automatically switch gfx6 vs. gfx9
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-18 11:48:52 +02:00