6d42333b16
intel/genxml/xe2: Update PIPELINE_SELECT
...
'Media Sampler DOP Clock Gate Enable' and 'Force Media Awake' don't
exist anymore.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26403 >
2023-12-07 14:16:18 +00:00
9898c719a2
intel/genxml/xe2: Update PIPE_CONTROL
...
'Tile Cache Flush Enable' and 'Generic Media State Clear' are now
reserved bits in gfx20+.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26403 >
2023-12-07 14:16:18 +00:00
36480b4d02
intel: Generate source file with utf-8 encoding from mako template
...
Make them generated in consistent way
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com >
Acked-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26515 >
2023-12-07 12:41:07 +00:00
05632fc9eb
intel/genxml: Update 3DSTATE_TE for xe2
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26438 >
2023-12-02 02:22:07 +00:00
a499be0ee3
intel/genxml: Update IDD for new fields
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26390 >
2023-12-01 02:36:12 +00:00
c916038b89
intel/genxml: Update COMPUTE_WALKER_BODY for xe2
...
Reworks:
* Caio: Change patch to only add COMPUTE_WALKER_BODY and
EXECUTE_INDIRECT_DISPATCH (that uses it).
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26390 >
2023-12-01 02:36:12 +00:00
ef1c1ca821
intel/genxml: Add the preferred slm size enum for xe2
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26390 >
2023-12-01 02:36:12 +00:00
bdb9c70f84
intel/genxml: Update INTERFACE_DESCRIPTOR_DATA for xe2
...
Reworks:
* Caio: Remove "Mask Stack Exception Enable", not present in BSpec.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26390 >
2023-12-01 02:36:12 +00:00
aafdf59dfe
intel/genxml: Update COMPUTE_WALKER for xe2
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26390 >
2023-12-01 02:36:12 +00:00
7a9e82e82f
genxml/12.5: Add the EXECUTE_INDIRECT_DISPATCH instruction
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26421 >
2023-11-30 17:01:45 +00:00
4229757309
genxml/12.5: Add the EXECUTE_INDIRECT_DRAW instruction
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26421 >
2023-11-30 17:01:44 +00:00
544c5c006c
intel/genxml: add the Gen12+ TR-TT registers
...
These are the registers we're going to use for now.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26036 >
2023-11-04 02:06:52 +00:00
f0d24b155b
intel/xehp+: Adjust TBIMR batch size based on slice count.
...
This programs a TBIMR batch size equal to 128 polygons per slice in
order to match the hardware spec recommendation (BSpec 68436). This
has been confirmed to improve performance slightly relative to the
hardware default batch size of 256 polygons.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25493 >
2023-10-27 14:50:42 -07:00
7cdacaf493
intel/xehp: Adjust TBIMR performance chicken bits.
...
This enables a couple of TBIMR performance tunables in
CHICKEN_RASTER_2 that default to disabled. TBIMR fast clip appears to
help slightly with some geometry-bound workloads. TBIMR open batch
allows the rasterizer to start working immediately on the first tile
of the framebuffer, even before the batch has been closed, which helps
reduce the latency cost of the tile walk.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25493 >
2023-10-27 14:50:42 -07:00
cec5541b02
intel/xehp+: Add TBIMR-related genxml definitions.
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25493 >
2023-10-27 14:48:29 -07:00
26c2c96d62
anv: enable FCV for Gen12.5
...
Now that we have proper handling of FCV_CCS_E everywhere, we can turn
this on for Gen12.5.
This helps fix a performance regression where enabling fast
clears to non-zero values with CCS_E caused additional partial resolves,
regressing performance on certain games. Performance is helped on the
following games:
- F1'22: +45%
- RDR2: +6%
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25589 >
2023-10-11 12:18:15 +00:00
300c98dbb2
intel/genxml: fix 3DSTATE_3D_MODE length to align with BSpec
...
Closes : #8632
Fixes: 569afd37f1rohan.garg@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25589 >
2023-10-11 12:18:15 +00:00
1c4d57568a
intel/genxml: remove HDC from gen11.xml, it is not available
...
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25399 >
2023-10-02 12:05:54 +00:00
961aa68b23
intel/genxml: Build with gen20.xml
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25253 >
2023-09-21 18:24:01 +00:00
6f1b1d6330
intel/genxml: Auto-import genxml files using genxml_import.py
...
$ src/intel/genxml/genxml_import.py --import
This can be reversed with:
$ src/intel/genxml/genxml_import.py --flatten
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20593 >
2023-09-14 11:05:16 -07:00
cd0c758f32
intel/genxml: Start Xe2 support
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20593 >
2023-09-14 11:05:16 -07:00
0495f952d4
intel/genxml: Add genxml_import.py script
...
This script can:
* validate that genxml files do not duplicate imported items
* add imports to genxml files and optimize the file by dropping
duplicate items
* reverse the import operation by flattening genxml files
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20593 >
2023-09-14 11:05:16 -07:00
6ad2f39bab
intel/genxml: Add GenXml.flatten_xml() method
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20593 >
2023-09-14 11:05:16 -07:00
c0f7feb239
intel/genxml: Add GenXml.add_xml_imports method
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20593 >
2023-09-14 11:05:16 -07:00
9e5190ad1f
intel/genxml: Drop assertion to allow for importing
...
For example, gen11.xml will import the HEVC_ARBITRATION_PRIORITY
struct from gen9.xml.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20593 >
2023-09-14 11:05:16 -07:00
614aa2e62b
intel/genxml: Add GenXml.optimize_xml_import()
...
This function drops duplicated items from a genxml file when they are
equivalent to the same item imported from another genxml file.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20593 >
2023-09-14 11:05:16 -07:00
1285337218
intel/genxml: Add all xml files as pack dependencies
...
Since the output can now depend on other imported xml files, we need
to add them all as dependencies to ensure that if any xml file is
changed, then all pack files are rebuilt.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20593 >
2023-09-14 11:05:16 -07:00
b076b4f99b
intel/genxml: Add support for excluding items when importing
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20593 >
2023-09-14 11:05:15 -07:00
6cc21dc8b5
intel/genxml: Support importing from another genxml file
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20593 >
2023-09-14 11:05:15 -07:00
9eba1d9187
intel/genxml: update PIPE_CONTROL instruction for dg2
...
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25124 >
2023-09-12 19:04:24 +00:00
f0d5c7848a
intel/genxml: Add STATE_COMPUTE_MODE instruction
...
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Tapani Pälli <tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24508 >
2023-09-08 23:08:26 +00:00
8c8fca53fd
intel/genxml: Fix comparing xml when node counts differ
...
This fix is more relevant to MR !20593 . Normally when sorting the
number of nodes will be equivalent today, so this bug will not be
encountered. But in !20593 , we can shrink (--import) or grow the
number of elements (--flatten) when the genxml_import.py tool is used.
Fixes: e60a0b1616jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24902 >
2023-09-06 07:18:47 +00:00
d8038c8d09
intel/genxml: Ignore tail leading/trailing whitespace in node_validator()
...
When importing or flattening genxml with the genxml_import.py script
in MR !20593 , it can lead to the tail portion of xml items differing
in whitespace.
If we strip the trailing and leading whitespace from the tail string,
and the strings are equivalent, then we can consider the xml items to
be equivalent.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24903 >
2023-09-06 06:51:48 +00:00
3e9f366b70
genxml/gfx12: rename Tiled Resource Mode
...
To match documentation.
BSpec 46965
TGL PRMs, Volume 2d: Command Reference: Structures, 3DSTATE_HIER_DEPTH_BUFFER_BODY
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620 >
2023-09-01 23:22:17 +00:00
cc985bb2ad
genxml/gfx11: remove Tiled Resource Mode field from HIER_DEPTH_BUFFER
...
This field doesn't exist according to documentation. Only a MBZ.
BSpec 6511
ICL PRMs, Volume 2a - Command Reference: Instructions (Command
Opcodes) 3DSTATE_HIER_DEPTH_BUFFER
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23620 >
2023-09-01 23:22:16 +00:00
c1a0bdae1c
intel/genxml: Update xml with gen_sort_tags.py output
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Dylan Baker <dylan@pnwbakers>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24605 >
2023-08-14 23:09:36 +00:00
549540ca7c
intel/genxml: Add final newline to output when saving xml
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Dylan Baker <dylan@pnwbakers>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24605 >
2023-08-14 23:09:36 +00:00
548a0bc7d2
intel/genxml: Don't rewrite sorted xml if the contents didn't change
...
Rework:
* Make better use of pathlib. (Dylan)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Dylan Baker <dylan@pnwbakers>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24605 >
2023-08-14 23:09:36 +00:00
e60a0b1616
intel/genxml: Move sorting & writing into GenXml class
...
Rework:
* Use "all" in is_equivalent_xml() (Dylan)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Dylan Baker <dylan@pnwbakers>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24605 >
2023-08-14 23:09:36 +00:00
493e8c4b50
intel/genxml: Add filter_engines() to GenXml class
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24547 >
2023-08-08 08:58:36 +00:00
5e275d8a2b
intel/genxml: Add GenXml class into intel_genxml module
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24547 >
2023-08-08 08:58:36 +00:00
6e54245d00
intel/genxml: Convert gen_pack_header to use ElementTree
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24547 >
2023-08-08 08:58:36 +00:00
a8a50332a6
intel/genxml: Convert gen_bits_header to use ElementTree
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24547 >
2023-08-08 08:58:36 +00:00
ef2f2ae765
intel/genxml: Split some genxml sorting code into a intel_genxml module
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24547 >
2023-08-08 08:58:36 +00:00
761bcc3716
intel/genxml: Align "Texture Coordinate Mode" naming
...
Some older gens used '_' (underscore) while newer gens used a ' '
(space).
$ sed -i 's/Texture_Coordinate_Mode/Texture\ Coordinate\ Mode/' \
src/intel/genxml/*.xml
The naming needs to be aligned for importing enums later on.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24547 >
2023-08-08 08:58:36 +00:00
373019f9ef
intel/genxml/gen125: Set MI_MATH MOCS field as non-zero
...
All MOCS tables have 0 as a invalid value, so this will asssert
in case some place misset to set MI_MATH MOCS field.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508 >
2023-08-01 19:49:45 +00:00
0233e3639f
intel/genxml/gen125: Add missing fields in MI_MATH
...
BSpec: 53415
BSpec: 45737
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508 >
2023-08-01 19:49:44 +00:00
614efeeafe
intel/genxml: set a default value for "Pixel Position Offset Enable" in genxml
...
Set the default value for "Pixel Position Offset Enable" when emitting
3DSTATE_MULTISAMPLE in the genxml so that we can drop it from blorp
and genX_state.
Signed-off-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23936 >
2023-07-18 22:25:38 +00:00
ef105f8cce
genxml/chv: Add MEMORY_OBJECT_CONTROL_STATE_CHV to document compared to BDW
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Francisco Jerez <currojerez@riseup.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23823 >
2023-07-13 00:32:09 -07:00
90535d7aef
genxml/hsw: Add additional MOCS field enumerations
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Francisco Jerez <currojerez@riseup.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23823 >
2023-07-13 00:32:05 -07:00
José Roberto de Souza