AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
155,854 Commits 1 Branch 0 Tags
cec48994cc9b5653ee7cbab3399de47d29d26b74
Commit Graph

8045 Commits

Author SHA1 Message Date
Lionel Landwerlin 9b11618dfa anv: disable perf queries on non RCS engines 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17015>
 2022-06-23 22:47:37 +00:00
Lionel Landwerlin 5d05ffa465 anv: limit RT writes to number of color outputs 
Not doing so crates skews occlusion queries. Fixes Zink's piglit
occlusion_query tests.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a4f502de32 ("anv: fix VK_DYNAMIC_STATE_COLOR_WRITE_ENABLE_EXT state")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6205
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15740>
 2022-06-22 21:45:52 +00:00
Marcin Ślusarz f871aa10a1 intel/compiler: assert that base is 0 for [load|store]_shared intrins 
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17143>
 2022-06-22 10:32:13 +00:00
Jordan Justen a7127fbc4c intel/tools: Print memory info in intel_dev_info 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Jordan Justen 1505f94397 anv: Use memory info from devinfo 
Rework:
 * Jordan: Drop regions.valid (Lionel implemented a fallback)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Lionel Landwerlin 4289c9ec13 intel/dev: add a fallback when memory regions are not available 
We have this in Anv and it could be reused in Iris for integrated
memory system.

Rework:
 * Jordan: Drop regions.valid (Lionel implemented a fallback)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Lionel Landwerlin 4e727297e8 intel/dev: add a helper to update memory info 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Jordan Justen 4aecfbf0f4 intel/dev: Add devinfo::mem to store i915 regions information 
Reworks:
 * Lionel: Change check on memory region valid to vram size
 * Jordan: Drop regions.valid (Lionel implemented a fallback)
 * Jordan: Rename devinfo::regions to devinfo::mem.
 * Jordan: Add devinfo::mem::use_class_instance
 * Add mesa_logw for lmem requiring regions. (s-b Lionel)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Lionel Landwerlin 4f10eddf77 anv: fix index buffer emission 
In the following case :

  vkCmdBindPipeline(compute_pipeline);
  vkCmdDispatch(...);
  vkCmdBindPipeline(graphics_pipeline);
  vkCmdBindIndexBuffer(buffer)
  vkCmdDraw(...);

We're emitting the 3DSTATE_INDEX_BUFFER instruction while the HW is
still in GPGPU mode, because we're dealing the pipeline selection to
vkCmdDraw().

Found while debugging Age Of Empire 4, HW is hung on
3DSTATE_INDEX_BUFFER instruction.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17153>
 2022-06-21 16:24:10 +00:00
Marcin Ślusarz 008163f382 intel/compiler: vectorize task payload loads/stores 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17000>
 2022-06-20 17:38:20 +00:00
Mykhailo Skorokhodov 50b21fb6e4 anv: Use sampleLocationsEnable for sample locations 
The spec says: "sampleLocationsEnable controls whether custom sample
locations are used. If sampleLocationsEnable is VK_FALSE, the default
sample locations are used and the values specified in
sampleLocationsInfo are ignored."

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6675
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17134>
 2022-06-20 11:58:09 +00:00
Marcin Ślusarz 4e4ef72aac intel/dev: fixup max_cs_workgroup_threads after hwconfig is read 
Without it we get max value from gfx12 on gfx>12.

Fixes: d9ff9ea9c3 ("intel/dev: Read hwconfig from i915")

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17063>
 2022-06-20 07:43:43 +00:00
Jason Ekstrand 7a8ec23c9d anv: Properly clamp attachment layer counts 
Vulkan requires that the acutal layer count come from
VkRenderingInfo::layerCount or VkFramebufferCreateInfo::layers rather
than from the image view itself.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17060>
 2022-06-17 18:33:58 -05:00
Ian Romanick 676acfe956 intel/fs: Add missing synchronization for WaW dependency 
v2: Do the synchronization in the correct place.  Noticed by Curro.

Fixes: b5fa43952a ("intel/fs: Better handle constant sources of FS_OPCODE_PACK_HALF_2x16_SPLIT")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17037>
 2022-06-17 17:05:43 +00:00
Lionel Landwerlin 03e543a422 intel/validator: validate dst/src types against devinfo support 
v2: deal with src3_a1/src3_a16 instruction types (Curro)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16985>
 2022-06-17 15:43:05 +00:00
David Heidelberg 2df90aa562 ci/iris: disable Blender Diorama trace (incompatible with perf. traces) 
Sadly, Blender Diorama trace causes crash for our performance tracing as we
use it right now.

Let's disable it for now, until we figure out what's wrong.

Reported in: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6676

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17083>
 2022-06-16 19:07:15 +00:00
Iván Briano 4666ef720e anv: do not get rid of empty/useless fragment shaders 
This was an optimization done a while ago that doesn't seem to be having
much of an impact anymore, and on the other hand, causes all sorts of
breakage with queries, as many of our HW counters don't get incremented
when rasterization is disabled.

This fixes a bunch of issues Zink has with ANV, but more importantly, it
fixes upcoming CTS tests:
dEQP-VK.transform_feedback.primitives_generated_query.*.empty_frag.*
dEQP-VK.transform_feedback.primitives_generated_query.*.no_attachment.*
dEQP-VK.transform_feedback.primitives_generated_query.*.color_write_disable_*

Cc: mesa-stable

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17038>
 2022-06-16 14:42:12 +00:00
Mark Janes a1a5f6430a intel: provide a callback to clean up after intel_measure_gather 
The caller may have passed ownership of intel_measure_batch structures
to intel_measure until they are ready to be gathered.  The caller
needs a notification when rendering is complete and snapshots have
been processed, so it can free the resources that measure the batch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16571>
 2022-06-16 02:58:08 +00:00
Mark Janes 34a130fedf anv: fix performance bug in INTEL_MEASURE 
Re-allocating the buffer object for snapshots carries a heavy penalty
at run-time.  When resetting a command buffer, the buffer object that
is allocated for snapshots may be re-used directly on subsequent
renders.

Stale snapshot data will persist in the buffer object.  To verify that
rendering is complete, zero the final timestamp value and check that
it has been written before gathering data.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16571>
 2022-06-16 02:58:08 +00:00
Mark Janes c4c096e66e intel: relax assertion in INTEL_MEASURE 
It is possible that a secondary command buffer was submitted with no
renders in it.  For that case, no timestamp will be collected.  Only
verify that timestamps if the index is nonzero.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16571>
 2022-06-16 02:58:08 +00:00
Mark Janes 3c53c6b247 intel: parse intel_measure environment without side effects 
If an application links agaist both iris and anv, they will clash when
parsing the INTEL_MEASURE environment variable.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16571>
 2022-06-16 02:58:08 +00:00
Emma Anholt 979f213110 ci/iris: Disable blender-demo-cube_diorama on APL. 
It has timed out on 3 jobs today.

Fixes: 96f0944a69 ("ci/panfrost: add Blender, Warzone2100, Freedoom and Unvanquished traces")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17041>
 2022-06-15 23:28:23 +00:00
Yonggang Luo 0f3064ee44 intel: using C++11 keyword thread_local 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15087>
 2022-06-15 17:37:16 +00:00
Jordan Justen 81d6ae31d6 anv, iris: Enable compute engine with INTEL_COMPUTE_CLASS=1 
If this environment variable is set, then a detected compute engine
will be used as described in docs/envvars.rst.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>
 2022-06-15 08:58:20 +00:00
Jordan Justen 0c90c695f5 anv, iris: Add support for I915_ENGINE_CLASS_COMPUTE 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>
 2022-06-15 08:58:20 +00:00
Jordan Justen b27720f2a1 anv: Move STATE_BASE_ADDRESS programming into init_common_queue_state() 
This is now needed following Ken's 8831cb38aa.

Ref: 8831cb38aa ("anv: Stop updating STATE_BASE_ADDRESS on XeHP")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>
 2022-06-15 08:58:20 +00:00
Jordan Justen 09d12e6727 anv: Add support for I915_ENGINE_CLASS_COMPUTE in init_device_state() 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>
 2022-06-15 08:58:20 +00:00
Jordan Justen 60e29fc7c5 intel/gem: Add support for I915_ENGINE_CLASS_COMPUTE 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>
 2022-06-15 08:58:20 +00:00
Lionel Landwerlin b0cd7bc8c1 anv: don't expose EXT_border_color_swizzle on gfx7 
This requires EXT_custom_border_color which isn't supported on gfx7.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: fbcf65bfea ("anv: VK_EXT_border_color_swizzle")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17025>
 2022-06-15 07:30:52 +00:00
David Heidelberg f58168850f ci/iris: add Blender, Warzone2100, Freedoom and Unvanquished traces 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16909>
 2022-06-14 11:52:45 +00:00
Mike Blumenkrantz fbcf65bfea anv: VK_EXT_border_color_swizzle 
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16992>
 2022-06-14 01:52:50 +00:00
Jason Ekstrand ce60195ecd anv: Use NIR_PASS(_, ...) 
I don't know when this was added but it's really neat and we should use
it instead of NIR_PASS_V since NIR_DEBUG=print and a few validation
things will work better.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17014>
 2022-06-13 22:31:25 +00:00
Jason Ekstrand 844a70f439 intel/compiler: Use NIR_PASS(_, ...) 
I don't know when this was added but it's really neat and we should use
it instead of NIR_PASS_V since NIR_DEBUG=print and a few validation
things will work better.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17014>
 2022-06-13 22:31:25 +00:00
Francisco Jerez 96e7e92f0d intel/fs/xehp+: Emit scheduling fence for all NIR barriers on platforms with LSC. 
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15743>
 2022-06-12 12:56:47 +03:00
Tapani Pälli 47773a5d7c intel/fs: setup SEND message descriptor from nir scope 
This fixes many tests in following groups on DG2:
   dEQP-VK.memory_model.*
   dEQP-VK.fragment_shader_interlock.*

v2: use memory scope and setup descriptor also
    for barriers without defined scope (Curro),
    use local scope and flush type none with
    NIR_SCOPE_NONE scope, cleanups (Lionel)

v3: use LSC_FENCE_THREADGROUP for NIR_SCOPE_WORKGROUP,
    remove default case (Curro), use eviction if scope
    was not defined, use LSC_FENCE_GPU scope for vertex
    stage

v4: use LSC_FENCE_TILE independent of stage for device
    scope (Curro)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15743>
 2022-06-12 12:29:47 +03:00
Georg Lehmann 9ccc683973 anv: Implement VK_EXT_non_seamless_cube_map. 
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12730>
 2022-06-10 18:31:57 +00:00
Kenneth Graunke a8e718c7e5 intel/compiler: Fix A64 header construction with a uniform address 
fs_visitor::assign_curb_setup() maps UNIFORM registers to HW regs,
and contains the following assert:

            assert(inst->src[i].stride == 0);

emit_a64_oword_block_header's striding tricks run afoul of this
restriction, by producing stride 1 values on a 64-bit UNIFORM source.

Work around this by copying the UNIFORM value to a VGRF first.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16938>
 2022-06-10 02:14:57 +00:00
Jason Ekstrand a820dc4a8e anv/wsi: Stop resetting semaphores 
This will happen automatically when they're waited on by the dummy
submit in wsi_common_queue_present().

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4037>
 2022-06-10 01:33:12 +00:00
Kenneth Graunke 18b3ad5a09 intel: Set a more useful fake devinfo->gtt_size in no-hw mode 
With the old value, anv didn't think that the hardware supported 48-bit
addresses, and hit this assert:

   assert(device->supports_48bit_addresses == !device->use_relocations);

The new value of 1ull << 48 is the one reported on my Icelake machine.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16933>
 2022-06-10 00:56:36 +00:00
Ian Romanick 65d6708bc3 anv: Remove FS executables when applying the null FS optimization 
If the executables are still hanging out,
anv_GetPipelineExecutableStatisticsKHR will try to dereference NULL
pointers in pipeline->shaders[MESA_SHADER_FRAGMENT].

At least in terms of fossil-db output, this matches the behavior from
before 73b3efcd59.

Fixes: 73b3efcd59 ("anv: Handle the null FS optimization after compiling shaders")
Closes: #6590
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16898>
 2022-06-10 00:22:05 +00:00
Emma Anholt e8d4eaf172 ci/iris: Disable skqp until it can be stabilized. 
It keeps blocking marge with flakes across many different tests.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16951>
 2022-06-09 18:35:24 +00:00
Jordan Justen ffb0c97caf intel: Build mi_builder_test whenever build-tests is set 
Previously `install-intel-gpu-tests` controlled this, but now
`install-intel-gpu-tests` will only be used to decide if it should be
installed.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16902>
 2022-06-07 18:26:02 +00:00
Jason Ekstrand 81603e7dc2 anv: Use the common image<->buffer copy helper 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16873>
 2022-06-07 17:57:42 +00:00
Jason Ekstrand 2c2b3e68e1 vulkan,anv: Move the image offset/extent sanitize helpers to common code 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16873>
 2022-06-07 17:57:41 +00:00
Jordan Justen 8381f64251 intel: Fix build of mi_builder_tests by including c99_compat.h 
We need this so C++ will understand "restrict" which is used in the
genxml output.

Fixes: 9f717b5f23 ("util: remove needless c99_compat.h includes")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16899>
 2022-06-07 08:27:19 +00:00
Emma Anholt 464b32c030 glsl: Drop the div-to-mul-rcp lowering for floats. 
NIR has fdiv, and all the NIR backends have to have lower_fdiv set
appropriately already since various passes (format conversions,
tgsi_to_nir, nir_fast_normalize(), etc.) might generate one.

This causes softpipe and llvmpipe to now do actual divides, since
lower_fdiv is not set there.  Note that llvmpipe's rcp implementation is a
divide of 1.0 by x, so now we're going to be just doing div(x, y) instead
of mul(x, div(1.0, y)).

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823>
 2022-06-07 02:38:42 +00:00
Tapani Pälli d07ec3f038 anv: use anv_cmd_dirty_mask_t type for dynamic state 
We were using both uint32_t and anv_cmd_dirty_mask_t, this is
a cleanup making type usage consistent. Commit also changes type of
the mask to be enum anv_cmd_dirty_bits.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16849>
 2022-06-03 14:11:04 +03:00
Erik Faye-Lund 2a134347cb intel/compiler: use macro for power-of-two check 
This will allow the use of static_assert here instead of our
compiler-specific implementation.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16670>
 2022-06-03 07:14:43 +00:00
Paulo Zanoni 72a7d7d7a8 intel/compiler: call ordered_unit() only once at update_inst_scoreboard() 
Call it once instead of calling the very same function for each source
and destination. This should make those ternary operators a little
easier to read, IMHO.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15835>
 2022-06-02 23:04:39 +00:00
Paulo Zanoni 2256314b08 intel/compiler: split handling of 64 bit floats and ints 
In opt_algebraic(), handle TYPE_DF in a different check than TYPE_Q. We have a
separate flag for each type, use separate checks so platforms where one is true
and the other is not can work properly.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15835>
 2022-06-02 23:04:39 +00:00