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6731 Commits

Author SHA1 Message Date
Samuel Pitoiset caa4a218f1 radv/winsys: set use_global_list inside the critical section 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9006>
 2021-02-12 19:12:01 +00:00
Samuel Pitoiset 7379ca4043 radv: only make the WSI images resident if the global BO list is used 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4270
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4286
Fixes: 96b03aaa17 ("radv: use the global BO list from the winsys")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9006>
 2021-02-12 19:12:01 +00:00
Daniel Schürmann 44a76ba16d aco: use VCC as regular SGPR pair on GFX10 
There is no need to reserve it for special purposes, only.

Totals from 139391 (100.00% of 139391) affected shaders (Navi10):
VGPRs: 4738296 -> 4738156 (-0.00%); split: -0.01%, +0.00%
SpillSGPRs: 16188 -> 14968 (-7.54%); split: -7.60%, +0.06%
CodeSize: 294204472 -> 294118048 (-0.03%); split: -0.04%, +0.01%
MaxWaves: 2119584 -> 2119619 (+0.00%); split: +0.00%, -0.00%
Instrs: 56075079 -> 56056235 (-0.03%); split: -0.05%, +0.01%
Cycles: 1757781564 -> 1755354032 (-0.14%); split: -0.16%, +0.02%
VMEM: 52995887 -> 52996319 (+0.00%); split: +0.07%, -0.07%
SMEM: 9005338 -> 9004858 (-0.01%); split: +0.16%, -0.17%
VClause: 1178436 -> 1178331 (-0.01%); split: -0.02%, +0.01%
SClause: 2403649 -> 2404542 (+0.04%); split: -0.14%, +0.18%
Copies: 3447073 -> 3432417 (-0.43%); split: -0.66%, +0.23%
Branches: 1166542 -> 1166422 (-0.01%); split: -0.11%, +0.10%
PreSGPRs: 4229322 -> 4235538 (+0.15%)
PreVGPRs: 3817111 -> 3817040 (-0.00%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
 2021-02-12 19:00:18 +00:00
Daniel Schürmann 112f389261 aco: don't abort() if disassembly fails 
We used that to catch assembly errors in the past,
but now, there are too many hardware features we
use in ACO that are not supported by the LLVM disassembler,
that it is not really suited anymore as a debugging tool.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
 2021-02-12 19:00:18 +00:00
Daniel Schürmann 171fbe3ae1 aco: check get_reg_specified() on register hints 
This ensures that max_used_sgpr is adjusted accordingly.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
 2021-02-12 19:00:18 +00:00
Daniel Schürmann dd16e21e97 aco: also consider VCC in get_reg_specified() 
This allows split_vector and others to keep their VCC position.

Totals from 4573 (3.28% of 139391) affected shaders (Navi10):
CodeSize: 54292268 -> 54289324 (-0.01%); split: -0.03%, +0.03%
Instrs: 10327645 -> 10326941 (-0.01%); split: -0.04%, +0.04%
Cycles: 744410748 -> 744034732 (-0.05%); split: -0.07%, +0.02%
VMEM: 749093 -> 749092 (-0.00%); split: +0.00%, -0.00%
SMEM: 269306 -> 269322 (+0.01%)
SClause: 358746 -> 358744 (-0.00%)
Copies: 826051 -> 823910 (-0.26%); split: -0.55%, +0.29%
Branches: 355074 -> 356493 (+0.40%); split: -0.01%, +0.41%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
 2021-02-12 19:00:18 +00:00
Daniel Schürmann 947bf0bd67 aco: don't decrease the vgpr_limit when encountering bpermute 
Instead we recalculate vgpr_limit on demand, depending on
the number of needed shared VGPRs.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
 2021-02-12 19:00:18 +00:00
Daniel Schürmann b98a4d4dd7 aco: refactor GPR limit calculation 
This patch delays the calculation of GPR limits in order to
precisely incorporate extra registers (VCC etc.) and shared VGPRs.

Additionally, the allocation granularity is used to set the config.
This has some effect on the reported SGPR stats.

Totals (Navi10):
SGPRs: 6971787 -> 17753642 (+154.65%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
 2021-02-12 19:00:18 +00:00
Daniel Schürmann eaf681724e aco: change gpr_alloc_granule to full alignment 
This also switches the alloc_granule of Tonga and Iceland
to 96, so that the calculation is consistent.
Also changes the granularity for RDNA to 16 to keep
better stats with the upcoming patch.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
 2021-02-12 19:00:18 +00:00
Daniel Schürmann bacc3b36f5 aco: fix shared VGPR allocation on RDNA2 
VGPRs are now allocated in blocks of 8 normal
or 16 shared VGPRs, respectively.

Fixes: 14a5021aff ('aco/gfx10: Refactor of GFX10 wave64 bpermute.')

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
 2021-02-12 19:00:18 +00:00
Samuel Pitoiset 335c8b68d2 radv: emit pipeline bind markers for SQTT 
I suspect this marker to be useful for correlating pipeline shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8995>
 2021-02-12 18:13:49 +00:00
Bas Nieuwenhuizen 045a85085a radv: Ignore WC flags for VRAM. 
Otherwise there might be buffers for which we don't have a type.

Fixes: 7262c743dc ("radv: Determine memory type for import based on fd.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4280
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8996>
 2021-02-12 14:04:56 +00:00
Bas Nieuwenhuizen c78b372dd0 radv: Define supported extensions in C. 
One python generator less.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8900>
 2021-02-12 01:56:00 +00:00
Bas Nieuwenhuizen 8331b7c8d5 radv: Remove custom icd json generation. 
No Android.mk changes as the radv provided json file isn't used.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8900>
 2021-02-12 01:56:00 +00:00
Rhys Perry d906c007d6 radv: use a more relaxed alignment for upload buffer allocations 
256 bytes was higher than necessary.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8833>
 2021-02-11 11:44:06 +00:00
Samuel Pitoiset 9de8745399 ac/rgp: append the number of seconds to the generated RGP file 
To not overwrite the previous ones.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8960>
 2021-02-11 09:29:31 +00:00
Samuel Pitoiset a1185d09f0 radv: add support for resizing the SQTT buffer automatically 
The buffer is resized when too small, the 150% limit is arbitrary and
works in most cases.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8960>
 2021-02-11 09:29:31 +00:00
Samuel Pitoiset 9d79bb24b4 radv: adjust an error message related to the SQTT buffer size 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8960>
 2021-02-11 09:29:31 +00:00
Samuel Pitoiset c7e6f4ff3d radv: do not overallocate the SQTT buffer 
The total size is computed for all available SEs which is not always 4.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8960>
 2021-02-11 09:29:31 +00:00
Samuel Pitoiset ed7e6eb54b radv: fix memory leaks if a submission fails 
If the device isn't lost, the application might want to re-submit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8931>
 2021-02-10 12:25:38 +00:00
Rhys Perry f7575fa71f aco: fix adjust_vertex_fetch_alpha 
These offsets were wrong and didn't match the old behaviour.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: e8220e106b ("aco: optimize AC_FETCH_FORMAT_SNORM alpha adjust")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8935>
 2021-02-10 09:37:17 +00:00
Samuel Pitoiset 19711b0f44 radv: stop allocating useless ESGS scratch BO on GFX10+ 
On GFX10+, the ESGS ring is allocated in LDS. This saves one BO
when geometry shaders are used, and possibly two BOs if nothing
else (tess, scratch, etc) is used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8926>
 2021-02-10 08:45:35 +00:00
Samuel Pitoiset caafedf38f radv: fix double free when creating a fence failed 
It's already freed in radv_destroy_fence().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8938>
 2021-02-10 08:45:49 +01:00
Rhys Perry e2608312d3 aco: remove loop to flag loop blocks as WQM 
This is no longer necessary.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8446>
 2021-02-09 17:52:17 +00:00
Rhys Perry ed020008b5 aco: rewrite setting of Exact_Branch 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8446>
 2021-02-09 17:52:17 +00:00
Rhys Perry f0074a6f05 aco: do not flag all blocks WQM to ensure we enter all nested loops in WQM 
This should no longer be necessary since the mark_block_wqm() we use to
flag break conditions as WQM now adds block to the worklist. With them
added to the worklist, get_block_needs() will add WQM to block_needs.

Adding WQM to block_needs here without adding the block to the worklist
(like we do here) can cause issues because it does not ensure that the
predecessors' branches are in WQM (needed for it to be possible to
transition to WQM in the block). This happened in an Overwatch shader.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 661922f6ac ("aco: add block to worklist in mark_block_wqm()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4066
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8446>
 2021-02-09 17:52:17 +00:00
Samuel Pitoiset cc39225014 radv: fix printing the debug option names 
radv_dump_enabled_options() doesn't like holes. While we are at it,
use ull everywhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8925>
 2021-02-09 13:09:24 +00:00
Rhys Perry e8220e106b aco: optimize AC_FETCH_FORMAT_SNORM alpha adjust 
This looks like it was copied from LLVM, which didn't have a fmax
intrinsic.

fossil-db (GFX8):
Totals from 43 (0.03% of 140385) affected shaders:
CodeSize: 49660 -> 49488 (-0.35%)
Instrs: 10434 -> 10348 (-0.82%)
Cycles: 41736 -> 41392 (-0.82%)
VMEM: 13793 -> 13719 (-0.54%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8918>
 2021-02-09 12:58:22 +00:00
Bas Nieuwenhuizen bd7d8a77e9 radv: Fix vram override with fully visible VRAM. 
Fixes: cf2eebdf4f ("radv,gallium: Add driconf option to reduce advertised VRAM size.")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8915>
 2021-02-09 11:58:53 +00:00
Samuel Pitoiset 96b03aaa17 radv: use the global BO list from the winsys 
We had two different implements for the global BO list, one in RADV
and one in the winsys. This will also allow to make more BOs resident.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8868>
 2021-02-09 10:03:47 +00:00
Samuel Pitoiset f6c28474a3 radv/winsys: enable the global BO list unconditionally 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8868>
 2021-02-09 10:03:47 +00:00
Samuel Pitoiset 5b967ccf77 radv/winsys: add the resident BOs to the list of BOs at submit time 
The number of resident BOs is currently 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8868>
 2021-02-09 10:03:47 +00:00
Samuel Pitoiset afdbd71ba5 radv/winsys: add buffer_make_resident() to the API 
To make a BO resident (or to evict one).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8868>
 2021-02-09 10:03:47 +00:00
Samuel Pitoiset 16abc82ef0 radv/winsys: set use_global_list to avoid adding a BO twice 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8868>
 2021-02-09 10:03:47 +00:00
Samuel Pitoiset 3235ff5cf4 radv/winsys: move the debug_all_bos check outside of the add/del helpers 
The add/del helpers will be used to implement the global BO list
directly in the winsys.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8868>
 2021-02-09 10:03:47 +00:00
James Park 7008e6558a radv: Update JSON generator if Windows 
Use vulkan_radeon.dll, and apply current working directory.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8911>
 2021-02-08 16:22:10 +00:00
Samuel Pitoiset 6ac6e2fbfb radv: stop using VM_ALWAYS_VALID on APUs 
It seems that VM_ALWAYS_VALID means that all BOs must fit in
memory (VRAM+GTT) for each submission. This is causing a lot of
troubles when the total allocated memory is greater than the
available memory, especially on APUs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8779>
 2021-02-08 11:24:25 +00:00
Samuel Pitoiset 6a3de3a31f radv: add radeon_winsys_bo::use_global_list 
This will allow us to use the global BO list even without
RADEON_FLAG_PREFER_LOCAL_BO which can cause a lot of troubles
on APUs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8779>
 2021-02-08 11:24:25 +00:00
Samuel Pitoiset 0e00c4ea33 radv: use less AMDGPU contexts by creating only one per queue priority 
It should be more efficient. Suggested by Bas.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8878>
 2021-02-08 08:48:21 +00:00
Samuel Pitoiset e498f25ff4 radv/winsys: stop zeroing radv_amdgpu_cs_request 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8859>
 2021-02-08 08:45:49 +01:00
Samuel Pitoiset abb3fab7c6 radv/winsys: remove unused fields in radv_amdgpu_cs_request 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8859>
 2021-02-08 08:45:47 +01:00
Samuel Pitoiset 0856f559a9 radv/winsys: simplify the user fence logic for submission 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8859>
 2021-02-08 08:45:46 +01:00
Samuel Pitoiset 05c383f948 radv/winsys: remove unused radeon_bo_usage enum 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8859>
 2021-02-08 08:45:44 +01:00
Samuel Pitoiset a6104ff053 radv/winsys: remove useless is_local check in radv_amdgpu_cs_add_buffer() 
radv_cs_add_buffer() already guarantees that and virtual buffers
are added via radv_amdgpu_cs_add_virtual_buffer().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8859>
 2021-02-08 08:45:42 +01:00
Samuel Pitoiset 856775400d radv/winsys: remove useless continue preamble CS for IBs path 
It's only used for the sysmem path which is GFX6.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8859>
 2021-02-08 08:45:40 +01:00
Samuel Pitoiset e02b1577d0 radv/winsys: remove the radv_amdgpu_winsys_bo::ws indirection 
This saves a 64-bit pointer from radv_amdgpu_winsys_bo and it's
also common to pass a winsys pointer as the first parameter.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8859>
 2021-02-08 08:45:38 +01:00
Samuel Pitoiset eb625b7a5f radv/winsys: use an array for the global BO list instead of a list 
This allows to remove one 64-bit pointer from radv_amdgpu_winsys_bo.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8859>
 2021-02-08 08:45:36 +01:00
Mauro Rossi b45c8a8671 android: radv: fix building error in radv_android.c 
Fixes the following building error:

external/mesa/src/amd/vulkan/radv_android.c:752:77: error: too few arguments to function call, expected 4, have 3
                VkResult result = radv_image_create_layout(device, create_info, mem->image);
                                  ~~~~~~~~~~~~~~~~~~~~~~~~                                ^
external/mesa/src/amd/vulkan/radv_private.h:2175:1: note: 'radv_image_create_layout' declared here
VkResult
^
1 error generated.

Fixes: 7f7da82dbb ("radv: Add image layout with drm format modifiers.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8899>
 2021-02-07 21:47:37 +01:00
Mauro Rossi ecdef27117 android: radv: port to using common dispatch code. 
Fixes the following building error in Android:

FAILED: ninja: 'external/mesa/src/amd/vulkan/radv_entrypoints_gen.py',
needed by 'out/target/product/x86_64/gen/STATIC_LIBRARIES/libmesa_radv_common_intermediates/radv_entrypoints.c',
missing and no known rule to make it

Fixes: 23f8ca0c9d ("radv: port to using common dispatch code.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8899>
 2021-02-07 21:47:37 +01:00
Bas Nieuwenhuizen 862b6a9a97 radv: Improve spilling on discrete GPUs. 
The linked bug gets better performance and I personally verified
better spilling performance on HZD so let us make this step for now.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3183
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3698
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
CC: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6833>
 2021-02-06 21:52:10 +00:00