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175966 Commits

Author SHA1 Message Date
Samuel Pitoiset c6ffde61cc radv: update NUM_THREAD_FULL bitfields 
They are similar but it avoids confusion when looking at RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417>
 2024-05-30 11:05:03 +00:00
Samuel Pitoiset 78b4d356f3 ac,radv,radeonsi: add ac_gpu_info::has_tc_compatible_htile 
It's apparently not supported on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417>
 2024-05-30 11:05:03 +00:00
Samuel Pitoiset 94a6eb20f9 amd/common: define SDMA v7.0 for GFX12 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417>
 2024-05-30 11:05:03 +00:00
Samuel Pitoiset 5ff1e59ba7 radv: only emit streamout enable for legacy streamout 
Only for GFX6-10.3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29460>
 2024-05-30 10:43:25 +00:00
Boris Brezillon 6fe5129d3d panvk: Override the default GetRender[in]AreaGranularityKHR() 
Expose the real optimal render area granularity to users, so they can
optimize their rendering operations accordingly.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Suggested-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443>
 2024-05-30 12:16:40 +02:00
Boris Brezillon 8c2b4de386 panvk: Make sure replay of command buffers containing Dispatch calls works 
In order to replay a command buffer, we need to reset the job status
fields of all previously executed jobs, which is done by walking the
the per-batch jobs array.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Cc: stable
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443>
 2024-05-30 12:16:40 +02:00
Boris Brezillon 0142fdf81c panvk: Make sure we run the fragment shader if alpha_to_coverage is enabled 
If alpha-to-coverage is enabled, we need to run the fragment shader even
if we don't have a color attachment, so depth/stencil updates can be
discarded if alpha, and thus coverage, is 0.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443>
 2024-05-30 12:16:40 +02:00
Boris Brezillon 98ab2d3436 panvk: Make sure we don't lose clear-only operations 
The batch might contain just a clear operation on the color/depth/stencil
attachments. We need to make sure fragment jobs are emitted in that
case, which only happens if the framebuffer descriptor is != NULL.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443>
 2024-05-30 12:16:40 +02:00
Boris Brezillon a1be9ee375 panvk: Fix dynamic rendering with images containing both depth and stencil 
When the depth or stencil attachment points to an image that contains
both components and only one of those is updated, we need to preload
the other.

We also need to patch the ZS view to use the format with both components
when that happens.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443>
 2024-05-30 12:16:40 +02:00
Boris Brezillon c82ce475d1 panvk: Skip depth/stencil attachments with non-matching aspect mask 
Image views passed to the depth or stencil attachment might not have
the according depth/stencil aspect set in the image view. In that case,
we won't be able to preload or write the attachment, so let's just
act as if the attachment wasn't passed.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443>
 2024-05-30 12:16:40 +02:00
Boris Brezillon e17e285b8f panvk: Force a preload when the render area is not 32x32 aligned 
If we don't do that, we lose the content that's outside the defined
render area but inside the 32x32 aligned render area.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443>
 2024-05-30 12:16:40 +02:00
Boris Brezillon 9ff5e56eb7 panvk: Take VK_RENDERING_{RESUM,SUSPEND}ING_BIT flags into account 
Don't close the current batch when suspending a rendering pass, and
only open a new batch if the cur_batch was closed by a compute job
being queued in the middle.

We also don't re-init the FB info if we're resuming.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443>
 2024-05-30 12:16:40 +02:00
Boris Brezillon 6f8b691c2e panvk: Add a render state to panvk_cmd_graphics_state 
We will store information extracted from VkRenderingInfo there instead
of abusing the fb state, which is now part of the render state.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29443>
 2024-05-30 12:16:40 +02:00
Rhys Perry ac47ee1be7 meson: remove --depfile for aco_tests 
This isn't needed right now and probably doesn't work. glsl_scraper.py
writes to the same depfile several times.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29348>
 2024-05-30 09:44:52 +00:00
Karol Herbst 11e85c8ce0 gallium/drivers: do not link against libgalliumvl directly 
libgalliumvl_stub was added so not all frontends have to link in full
video accleration support, shaving off around 100kB of binary size.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
 2024-05-30 08:44:23 +00:00
Karol Herbst b9ea6a3ab7 wgl: link against libgalliumvl_stub 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
 2024-05-30 08:44:23 +00:00
Karol Herbst 691a22f015 rusticl: link against libgalliumvl_stub 
Fixes compiling rusticl with certain configurations

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
 2024-05-30 08:44:23 +00:00
Karol Herbst b6f281bcb5 meson: centralize galliumvl_stub handling 
This way frontends can simply link against the stub, but get the full
version if it's actually required (e.g. for radeonsi).

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
 2024-05-30 08:44:23 +00:00
Karol Herbst 6c9c48a3ae gallium/vl: remove stubs which are defined in mesa_util 
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
 2024-05-30 08:44:23 +00:00
Karol Herbst 95871d48aa gallium/vl: stub vl_video_buffer_create_as_resource 
It's used by radeonsi

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
 2024-05-30 08:44:23 +00:00
Eric Engestrom 467fc985cd zink+nvk/ci: add flakes seen in latest nightly run 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29471>
 2024-05-30 07:39:40 +00:00
Lionel Landwerlin fd49b815ce anv: optimize POSTSYNC_DATA rewrites in timestamp emissions 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
 2024-05-30 06:38:04 +00:00
Lionel Landwerlin 3984875792 u_trace: extend tracepoint end_of_pipe bit into flags 
We ran into an issue with Intel drivers where it became tricky to tell
whether a timestamp must be recorded with a special end-of-pipe
compute instruction or something else.

We initially tried to deal with that internally by checking some state
in the command buffers but turns out it doesn't work.

This change adds a flag field to the tracepoint to have that
information there and the flags are passed to the record_ts vfunc.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
 2024-05-30 06:38:04 +00:00
Lionel Landwerlin 265b2b1255 anv: move last compute command pointers to the state structure 
Makes it easier to clear.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
 2024-05-30 06:38:04 +00:00
Lionel Landwerlin 1d4e56d22a anv: fix timestamp copies from secondary buffers 
We increased the size of the timestamps but only copied 64bit values
from the secondaries.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 521c216efc ("anv: use COMPUTE_WALKER post sync field to track compute work")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
 2024-05-30 06:38:04 +00:00
Lionel Landwerlin 1511b25b0f anv: fix utrace compute walker timestamp captures 
The output of the POSTSYNC_DATA has to be 32-byte aligned.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 521c216efc ("anv: use COMPUTE_WALKER post sync field to track compute work")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29438>
 2024-05-30 06:38:04 +00:00
Iago Toral Quiroga 5ec1f7fe38 v3dv: shader modules are deprecated with VK_KHR_maintenance5 
Instead, API users can pass the VkShaderModuleCreateInfo in the
pNext chain of  VkPipelineShaderStageCreateInfo.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29456>
 2024-05-30 06:07:41 +00:00
Jordan Justen c1d3fa007c intel/dev: Add BMG PCI IDs (with FORCE_PROBE set) 
Ref: bspec 68090
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457>
 2024-05-30 00:32:44 +00:00
Jordan Justen 1964346481 intel/dev: Add BMG device info 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457>
 2024-05-30 00:32:44 +00:00
José Roberto de Souza 25e7b74712 intel/dev: Add BMG stepping mapping 
Bspec: 68090
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457>
 2024-05-30 00:32:44 +00:00
José Roberto de Souza d4a180639f intel/dev: Add LNL stepping mapping 
Without this mapping no temporary workaround will be applied to LNL.

BSpec: 70821
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457>
 2024-05-30 00:32:44 +00:00
Jordan Justen 06ec218fdf intel/dev: Add INTEL_PLATFORM_BMG enum, BMG WA info 
intel/dev/mesa_defs.json also must be updated when the new platform
enum is added.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457>
 2024-05-30 00:32:44 +00:00
Jordan Justen b2dbed2da0 intel/dev/mesa_defs.json: Update LNL WA entries 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457>
 2024-05-30 00:32:44 +00:00
Kevin Chuang f8ccf70c99 anv: Properly fetch partial results in vkGetQueryPoolResults 
Currently for an "unavailable" query, if VK_QUERY_RESULT_PARTIAL_BIT is
set, anv will return (slot.end - slot.begin). This can cause underflow
because slot.end might still be at the initial value of 0.

This commit fixes the issue by returning 0 in that situation.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29447>
 2024-05-29 18:03:28 +00:00
Karmjit Mahil 7bdcbe11ac turnip: Remove workaround for CTS bug zero-sized inline uniform block 
The cts issue was addressed in:
  https://github.com/KhronosGroup/VK-GL-CTS/commit/ae8b8a07118a4e0dfc185a531abe234e9956725b

Affected:
  dEQP-VK.binding_model.descriptorset_random.*.iublimit*

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29414>
 2024-05-29 17:36:27 +00:00
Juan A. Suarez Romero a54f7f7dc5 v3d,v3dv: add compatibility revision in GPU name 
So the version matches exactly the same as reported by the kernel in
`/sys/kernel/debug/dri/128/v3d_ident`, or the version used in the
simulator.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29186>
 2024-05-29 16:23:40 +00:00
Juan A. Suarez Romero ac7971e7f4 v3d: use screen name in disk cache 
To keep in sync the GPU name used by the (pipe) screen and disk cache,
use the former in the latter.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29186>
 2024-05-29 16:23:40 +00:00
Rohan Garg 7900ecdfc7 isl: Enable volumetric STC_CCS,HiZ+CCS on gfx12.0 
The only remaining restriction applies to single sampled 3D textures on
Gen12.0. Move the check to disable CCS on such resources to the right
place.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646>
 2024-05-29 15:50:23 +00:00
Rohan Garg b69a34ab66 isl: disable CCS for 3D depth/stencil surfaces when WA is applicable 
Clarify why 3D Tile64 on depth stencil buffers is unfeasible.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646>
 2024-05-29 15:50:22 +00:00
Nanley Chery 1891b3db73 intel/isl: Allow sampling from 3D HIZ_CCS_WT 
The restriction in RENDER_SURFACE_STATE is gone.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646>
 2024-05-29 15:50:22 +00:00
Rohan Garg 309c228bb7 anv: 3D stencil surfaces have fewer layers for higher miplevels 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646>
 2024-05-29 15:50:22 +00:00
Rhys Perry 1829d74ad3 aco: fix fddx/y with uniform inf/nan input 
inf or nan subtracted by itself is not zero.

I don't think Vulkan requires this, but this better matches NIR's constant
folding and the divergent implementation.

fossil-db (navi31):
Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 537 -> 588 (+9.50%)
CodeSize: 3132 -> 3380 (+7.92%)
Latency: 2806 -> 2819 (+0.46%)
InvThroughput: 286 -> 316 (+10.49%)
Copies: 24 -> 39 (+62.50%)
VALU: 262 -> 289 (+10.31%)
SALU: 33 -> 51 (+54.55%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29418>
 2024-05-29 15:18:52 +00:00
Eric Engestrom b8f1e95cbe freedreno/a6xx: fix kernel -> compute handling 
9b2780dcaf folds the kernel path into the compute path, and then adds
a `compute -> compute` conversion that was very likely meant to be
`kernel -> compute`, so fix that.

Fixes: 9b2780dcaf ("freedreno/a6xx: Re-work fd6_emit_shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29458>
 2024-05-29 13:44:44 +00:00
Georg Lehmann b04d99d093 aco/optimizer: use p_create_vector to create mask when a copy can't be used 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422>
 2024-05-29 11:59:22 +00:00
Georg Lehmann 2b56a97374 aco/lower_to_hw: optimize split 64bit constant copies 
Foz-DB Navi21:
Totals from 3209 (4.04% of 79395) affected shaders:
Instrs: 6502065 -> 6496612 (-0.08%)
CodeSize: 35578300 -> 35556596 (-0.06%)
Latency: 66092924 -> 66092668 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 16968953 -> 16968900 (-0.00%); split: -0.00%, +0.00%
SClause: 198651 -> 198647 (-0.00%)
Copies: 597323 -> 591872 (-0.91%)
SALU: 930918 -> 925467 (-0.59%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422>
 2024-05-29 11:59:22 +00:00
Georg Lehmann 5910a46101 aco/lower_to_hw: use copy_constant_sgpr for masks 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422>
 2024-05-29 11:59:22 +00:00
Georg Lehmann 23d88e68fc aco: small constant copy optimizations 
Foz-DB Navi21:
Totals from 13 (0.02% of 79395) affected shaders:
CodeSize: 93432 -> 93376 (-0.06%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422>
 2024-05-29 11:59:22 +00:00
Georg Lehmann 54ad07c32a aco/lower_to_hw: add copy_constant_sgpr 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422>
 2024-05-29 11:59:22 +00:00
Georg Lehmann 56354c6cd7 aco: don't pass program to emit_bpermute 
Also change the param order, because the builder typically comes first.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422>
 2024-05-29 11:59:22 +00:00
Iago Toral Quiroga 98a86f8743 v3dv: lower maxVertexInputBindingStride to match vulkan runtime 
Since we now use the common vulkan runtime to handle pipeline state and
this sets a limit for this at MESA_VK_MAX_VERTEX_BINDING_STRIDE we should
do the same, or else we can run into an assert-fail in the runtime code.

Fixes:
dEQP-VK.pipeline.monolithic.bind_buffers_2.maintenance5.triangle_list.buffers5.stride_offset_rnd321.whole_size

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29454>
 2024-05-29 11:13:11 +00:00