Commit Graph

214701 Commits

Author SHA1 Message Date
Lars-Ivar Hesselberg Simonsen
af28c453ba panvk: Increase maxBufferSize to UINT32_MAX
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Lars-Ivar Hesselberg Simonsen
7408a09050 pan/format: Add PAN_BIND_TEXEL_BUFFER
Expands the format table with a dedicated bit for texel buffer use. We
can fit this by setting the size of the hw-field to 21, which is fine as
we never encode more than 21 bits (see MALI_PACK_FMT).

This bit is set for all formats that support PAN_BIND_SAMPLER_VIEW and
PAN_BIND_STORAGE_IMAGE.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Lars-Ivar Hesselberg Simonsen
c4ec6ea060 pan/va: Add late lowering passes for texel buffers
Adds a pass that lowers texel buffer accesses for textures/images to use
BufferDescriptors. This needs to be done late in case the resource
indices must be lowered first.

Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Lars-Ivar Hesselberg Simonsen
b3b6fba548 nir: Add pan intrinsics for texel buffer access
Will be used by panfrost to access texel buffers.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Ludvig Lindau
6da1c1d025 pan/genxml: Add ConversionDesc to v9+ BufferDescriptor
Add a field in BufferDescriptor to hold a ConversionDescriptor to
prepare for changing texel buffers to use BufferDescriptor instead of
TextureDescriptor

Also re-orders the descriptor based on word offset where appropriate.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Ludvig Lindau
4a3d5acc1d pan/genxml: Move BufferDescriptor for v9+
This change is required by the next commit.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Lars-Ivar Hesselberg Simonsen
dfb6a101f1 pan/genxml: Remove reg_format from v9+ ConversionDesc
The Register Format-field in ConversionDescriptor is not used since v9
and should be left as zero.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Ludvig Lindau
6058cd2dfa pan/va: Add LD_CVT
Adds LD_CVT instruction for loading memory with conversion.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Lars-Ivar Hesselberg Simonsen
a9e3b679f1 pan/va: Add LEA_BUF
Adds the non-immediate version of LEA_BUF_IMM.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Lars-Ivar Hesselberg Simonsen
68a14e8166 pan/va: Change LEA_BUF_IMM src description
Gives the src for LEA_BUF_IMM a more descriptive name and specifies the
size of the register.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Lars-Ivar Hesselberg Simonsen
3e3da8cf82 panfrost: Rename (LD|LEA)_BUFFER to (LD|LEA)_PKA
This aligns with internal naming and removes confusion with
LEA_BUF[_IMM].

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Ludvig Lindau
00b5275fe8 panfrost: Make instrs_equal check res table/index
Add resource table and index check to instruction equality function.
This prevents CSE from mistakenly eliminating LEA_BUF_IMM instructions
that load from different resources, but with the same buffer offset.

Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Lars-Ivar Hesselberg Simonsen
15868cf6e9 pan/format: Disable PAN_BIND_STORAGE_IMAGE for RGBA4/BGRA4
The RGBA4/BGRA4 formats had the PAN_BIND_STORAGE_IMAGE set, but we
cannot support that.

Fixes: d95423686f ("pan/format: Add PAN_BIND_STORAGE_IMAGE flag")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Lars-Ivar Hesselberg Simonsen
1e2ca4dad6 pan/format: Fix mapping for I16F
This was mapped to RG16F, while R16F should be correct.

Cc: mesa-stable
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Lars-Ivar Hesselberg Simonsen
89293120f0 panvk: Fix IUB decode
The base address used for bounds checking the entry was wrong. Directly
pass the end_of_entry address instead.

Fixes: db4bcd48d7 ("panvk: Fix IUB decode")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
2025-11-07 17:03:53 +00:00
Faith Ekstrand
35cdddf632 nir: Simplify assign_io_var_locations()
The size and stage parameters are left-overs from history.  Originally,
the function acted on a list and so it needed an explicit stage and size
output.  Now that it takes a NIR shader and a mode, we can just take the
stage from the shader and set num_(in|out)puts.

The one caller that actually used the explicit output parameter was
turnip.  However, given that the helper sorts and re-numbers all the I/O
variables, it's not like changing num_(in|out)puts instead of writing it
to some other location is that big of a deal.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38297>
2025-11-07 16:29:56 +00:00
Lionel Landwerlin
51cfdf3a9d anv: limit maxComputeSharedMemorySize to 48KiB
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38302>
2025-11-07 16:01:58 +00:00
Dave Airlie
04a0d512fa intel/elk: drop a bunch of tables for unused elk gens.
I just saw this flash past in a fedora compile.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38299>
2025-11-07 15:37:54 +00:00
Christian Gmeiner
c346f2b673 util/log: Add MESA_LOG_PREFIX environment variable to control log prefixes
Add a new MESA_LOG_PREFIX environment variable that allows fine-grained
control over log prefixes in file logger output on Linux. The variable
accepts a comma-separated list of options:
- "tag": include the tag prefix (e.g., "MESA:")
- "level": include the level prefix (e.g., "info:")

By default, both tag and level are included. Users can customize the
prefix by setting MESA_LOG_PREFIX to any combination (e.g., "tag",
"level", "tag,level", or empty string for no prefix), making the output
more flexible and readable for different use cases.

Other loggers (syslog, Android logcat, Windows debugger) are unaffected
and continue to include tag and level information as appropriate for
their format.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38217>
2025-11-07 13:38:52 +00:00
Pohsiang (John) Hsu
672c26535a mediafoundation: remove unused code
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38301>
2025-11-07 13:02:49 +00:00
Pohsiang (John) Hsu
e4630c3567 mediafoundation: remove private CODECAPI_AVEncVideoEnableFramePsnrYuv as this is published
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38301>
2025-11-07 13:02:49 +00:00
Pohsiang (John) Hsu
1528a88643 mediafoundation: periodic clang-format
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38301>
2025-11-07 13:02:48 +00:00
Eric Engestrom
03aa1e382a lavapipe/ci: mark more tests as flaky
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38305>
2025-11-07 12:46:08 +00:00
Eric Engestrom
c0044aa8f1 lavapipe/ci: document fixed tests
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38305>
2025-11-07 12:46:08 +00:00
Lucas Fryzek
4e6120f5af anv: Enable host_image_copy on emulated formats
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37691>
2025-11-07 12:14:31 +00:00
Lucas Fryzek
b558968f8e anv: Implement host_image_copy astc emulation on CPU
Refactor the intermediate buffer copy path to use a generic callback
approach, making the code more maintainable and easier to extend with
new format conversions.

The core copy_intermediate() function is now format-agnostic, accepting
a conversion callback that handles the actual data transformation. This
moves format-specific logic (RGB<->RGBA conversion and ASTC
decompression) into dedicated callback functions, making the conversion
path explicit at each call site rather than hidden inside the copy
function.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37691>
2025-11-07 12:14:31 +00:00
Lucas Fryzek
1c4235b529 anv: For HIC only convert tile worth of memory at a time
Instead of allocating a buffer for the entire RGB->RGBA conversion
process. Just allocate a smaller buffer that is the size of a tile and
do the conversion one tile at a time.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37691>
2025-11-07 12:14:31 +00:00
Lucas Fryzek
06cb90c07c util: Move ASTC unpack routines to common util
Move ASTC decompression code from mesa/main to src/util to make it
available for use by Vulkan drivers. This allows the Intel ANV driver
to use CPU-based ASTC decompression for host image copy operations
on hardware that doesn't natively support ASTC formats.

The _mesa_unpack_astc_2d_ldr() function signature is updated to use
pipe_format instead of mesa_format for better integration with the
util format system.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37691>
2025-11-07 12:14:31 +00:00
Christian Gmeiner
0be53b2ed8 anv: Fix needs_temp_copy() incorrectly matching depth/stencil formats
The needs_temp_copy() function was incorrectly identifying some
depth/stencil formats as needing RGB<->RGBA conversion.

VK_FORMAT_D32_SFLOAT_S8_UINT maps to PIPE_FORMAT_Z32_FLOAT_S8X24_UINT,
which has 3 channels (F32 depth, UP8 stencil, X24 padding). The
component count check (== 3) was matching this as an RGB color format,
causing depth/stencil images to incorrectly use the RGB conversion path.

Add an explicit vk_format_is_depth_or_stencil() check before the
component count test to ensure depth/stencil formats always use the
direct copy path.

Fixes: f97b51186f ("anv: intermediate RGB <-> RGBX copy for HIC")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37691>
2025-11-07 12:14:31 +00:00
Samuel Pitoiset
bbaaf2fec7 radv: move back ac_sqtt_{init,finish}() to the right places
Now that radv/tests no longer create compute pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38285>
2025-11-07 12:19:38 +01:00
Samuel Pitoiset
d371061309 radv/tests: use vkGetPipelineKeyKHR() instead of compiling pipelines
Getting the pipeline key is enough for this set of tests.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38285>
2025-11-07 12:15:38 +01:00
Job Noorman
fda0490784 ir3: enable nir_opt_uub
Enable nir_opt_uub in ir3_optimize_loop. To make sure we don't interfere
with nir_opt_load_store_vectorize, nir_opt_uub's lowering of imul to
umul_16x16 is only enabled after vectorizing.

Totals from 140908 (9.33% of 1510605) affected shaders:
MaxWaves: 1687210 -> 1713516 (+1.56%); split: +1.59%, -0.03%
Instrs: 118073810 -> 116316350 (-1.49%); split: -1.57%, +0.09%
CodeSize: 252147038 -> 247992436 (-1.65%); split: -1.77%, +0.13%
NOPs: 22177569 -> 22101617 (-0.34%); split: -1.29%, +0.95%
MOVs: 5361215 -> 5246163 (-2.15%); split: -2.86%, +0.72%
COVs: 1728869 -> 1693953 (-2.02%); split: -2.26%, +0.24%
Full: 2083701 -> 2058689 (-1.20%); split: -1.24%, +0.04%
(ss): 3013912 -> 2993026 (-0.69%); split: -1.54%, +0.85%
(sy): 1746154 -> 1711155 (-2.00%); split: -2.45%, +0.45%
(ss)-stall: 10509576 -> 10514455 (+0.05%); split: -0.79%, +0.83%
(sy)-stall: 47895875 -> 47061446 (-1.74%); split: -2.53%, +0.79%
STPs: 213699 -> 213523 (-0.08%); split: -0.12%, +0.03%
LDPs: 77629 -> 77469 (-0.21%); split: -0.32%, +0.11%
Preamble Instrs: 33860856 -> 33320325 (-1.60%); split: -2.03%, +0.43%
Early Preamble: 62136 -> 62115 (-0.03%); split: +0.02%, -0.05%
Constlen: 8306896 -> 8295976 (-0.13%); split: -0.17%, +0.04%
Last helper: 48512847 -> 48446850 (-0.14%); split: -0.34%, +0.20%
Last baryf: 1457776 -> 1454490 (-0.23%); split: -0.51%, +0.29%
Subgroup size: 12116544 -> 12118400 (+0.02%); split: +0.02%, -0.00%
Cat0: 24687449 -> 24577585 (-0.45%); split: -1.27%, +0.82%
Cat1: 7154983 -> 7004889 (-2.10%); split: -2.65%, +0.55%
Cat2: 47291859 -> 46934527 (-0.76%); split: -0.80%, +0.05%
Cat3: 27659651 -> 26640290 (-3.69%); split: -3.69%, +0.00%
Cat5: 3278715 -> 3278703 (-0.00%); split: -0.00%, +0.00%
Cat6: 1672689 -> 1551384 (-7.25%); split: -7.25%, +0.00%
Cat7: 3047494 -> 3048002 (+0.02%); split: -0.44%, +0.45%

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37869>
2025-11-07 10:23:32 +00:00
Job Noorman
c17ec6eeb0 ir3: add options parameter to ir3_optimize_loop
The next commit wants to conditionally run some optimizations. This
prepares for that.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37869>
2025-11-07 10:23:32 +00:00
Job Noorman
b36cc29049 ir3: removed unused parameter from ir3_optimize_loop
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37869>
2025-11-07 10:23:30 +00:00
Job Noorman
fd4b483bbc ir3: add support for umul24
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37869>
2025-11-07 10:23:29 +00:00
Job Noorman
3908a228bd nir: add opt_uub pass
Add a pass that uses nir_unsigned_upper_bound to simplify some ALU
operations:
- iand src, mask: if mask is constant with N least significant bits set
  and uub(src) < 2^N, the iand does nothing and can be removed.
- ult src, const: if uub(src) < cmp -> true
- uge src, const: if uub(src) < cmp -> false
- ilt src, const: if uub(src) >= 0 && cmp <  0 -> false
-                 if uub(src) >= 0 && cmp >= 0 -> ult src, const
- ige src, const: if uub(src) >= 0 && cmp <  0 -> true
-                 if uub(src) >= 0 && cmp >= 0 -> uge src, const
- umin src, const: if uub(src) <= const -> src
- umax src, const: if uub(src) <= const -> const
- imin src, const: if uub(src) >= 0 && const <  0 -> const
-                  if uub(src) >= 0 && const >= 0 -> umin src, const
- imax src, const: if uub(src) >= 0 && const <  0 -> src
-                  if uub(src) >= 0 && const >= 0 -> umax src, const
- imul src0, src1: if uub(srci) < UINT16_MAX -> umul_16x16 src0, src1
- imul src0, src1: if uub(srci) < UINT24_MAX -> umul24 src0, src1
- imul src0, src1: if uub(srci) < UINT23_MAX -> imul24 src0, src1

The imul optimization needs to be explicitly enabled using a pass
option. This is useful since 1) most backends don't support umul_16x16,
and 2) some passes (e.g., nir_opt_load_store_vectorize) need to analyze
imuls so lowering them before running such a pass makes their job more
difficult.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37869>
2025-11-07 10:23:29 +00:00
Job Noorman
0b348fb375 nir: add has_umul_16x16 option
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37869>
2025-11-07 10:23:29 +00:00
Mario Kleiner
ba82d36dce wsi/display: Allow atomic modeset for change of Colorspace or HDR poperties
At least some drivers need a full modeset to change the Colorspace
property or to en-/disable HDR mode. E.g., at least amdgpu-kms as
tested under Linux 6.8 on Polaris needs it. Otherwise the atomic
commit for disabling HDR in _wsi_display_cleanup_state() will fail,
and the connector stays stuck in HDR mode after vkDestroySwapchainKHR().

Fixes: 1ed78dd7ec ("wsi/display: Clean up DRM hdr/color state on swapchain destruction")
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Autumn Ashton <misyl@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37880>
2025-11-07 09:50:40 +00:00
Mario Kleiner
19b2e3b81b wsi/display: Initially set default HDR metadata from EDID for HDR modes
For a selected non-default imageColorSpace during swapchain creation,
make sure that proper HDR setup also works even if a client app does not
explicitly call vkSetHdrMetadataEXT() in time.

Assign the EDID provided metadata here, so the 1st atomic commit will
set Colorspace and HDR metadata properties on the connector, to make sure
HDR or other wide color gamut modes get enabled.

Without this, the chain->color_outcome_serial would stay at zero and
the properties would not ever get assigned during drm_atomic_commit(),
leaving HDR disabled on the display sink.

Fixes: 13137393f6 ("wsi/display: Expose HDR10 colorspace based on EDID")
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Autumn Ashton <misyl@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37880>
2025-11-07 09:50:40 +00:00
Mario Kleiner
19dc09aded wsi/display: Accept 0 nits for HDR light level properties for "undefined"
CTA-861-G section 6.9.1 Static Metadata Type 1 declares that zero values
for different groups of HDR Metadata properties are allowed, including
zero nits values for max display mastering luminance, max content light
level, max frame-average light level and min display mastering luminance.

A zero value is meant to be treated by the video sink as "undefined" /
"unknown", and handled accordingly. This is common for dynamically
generated visual content.

Therefore don't assert on some minimum nits level > 0, but only check for
a non-negative level.

Fixes: b4176393a0 ("wsi/display: Implement VK_EXT_hdr_metadata on KHR_display swapchain")
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Autumn Ashton <misyl@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37880>
2025-11-07 09:50:40 +00:00
Benjamin Cheng
3b9e2e9edc radeonsi/vcn: Re-enable AV1 unidir for new FW
The previous bitrate overshoot issue is fixed with new FW.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38287>
2025-11-07 09:18:01 +00:00
David Rosca
a9b2e9e480 radeonsi/vcn: Update spec, slice, quality and deblock params each frame
These params may change every frame, so we need to always send
them to FW, not just in begin session.

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38257>
2025-11-07 09:00:17 +00:00
David Rosca
7845ba5a8d radeonsi/vcn: Only allow to enable pre-encode on first frame
The quality level may change every frame, but we can only enable
pre-encode on first frame because it changes context buffer layout
and currently we only allow the context buffer to grow (append recon
pics at the end).

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38257>
2025-11-07 09:00:17 +00:00
David Rosca
b8c317c459 radeonsi/vcn: Drop vcn_enc_2_0 encode() override
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38257>
2025-11-07 09:00:16 +00:00
David Rosca
b2c733d5ad radeonsi/vcn: Remove before_encode() func
This is no-op.

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38257>
2025-11-07 09:00:16 +00:00
Valentine Burley
204b83d80f ci: Remove Piglit replayer from test-vk container/rootfs
We've been building the Piglit replayer in the test-vk container/rootfs,
but all trace-replay testing in CI is actually done using the test-gl
rootfs.

Despite the naming, the "gl" and "vk" rootfs variants don't correspond to
the graphics API being tested - just the different sets of tools
bundled.
The required tools for trace replay are already included in the test-gl
rootfs, so there's no need to build or use the test-vk variant for this
purpose.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38282>
2025-11-07 08:22:32 +00:00
spencer-lunarg
41c700fdbf llvmpipe: Remove unnecessary includes
Signed-off-by: spencer-lunarg <spencer@lunarg.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38202>
2025-11-06 22:39:33 +00:00
spencer-lunarg
171581aeae llvmpipe: Remove trailing whitespace
Signed-off-by: spencer-lunarg <spencer@lunarg.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38202>
2025-11-06 22:39:33 +00:00
Alyssa Rosenzweig
af872180e1 agx: use sparse live-sets
fixes O(N^2) memory usage and runtime around liveness/scheduling/spilling/RA,
and proves out the design for the common code sparse bitsets (I did need to make
an adjustment for this - worth the effort).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37908>
2025-11-06 21:34:33 +00:00
Natalie Vock
0cb1fca8fa nir: Use sparse bitset for liveness information
Some shaders, especially RTPSO shaders that have parts of the PSO
inlined, can become absolutely huge. Using a sparse bitset avoids
quadratic complexity in memory consumption for the liveness information.

This reduces peak memory usage in worst-case tests (hammering
compilation of many huge RTPSOs on 32 threads concurrently) by ~60%,
from 43GB to 18GB.

CPU time (seconds) differences for a workload with mostly small shaders:
Difference at 95.0% confidence
        -5.27 +/- 1.08963
        -0.88811% +/- 0.183626%
        (Student's t, pooled s = 0.629735)

Peak resident set usage for the mostly-small workload:
Difference at 95.0% confidence
        30809 +/- 13394.3
        1.59276% +/- 0.69246%
        (Student's t, pooled s = 7741.09)

CPU time for the heavy workload did not show any difference.

Co-authored-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37908>
2025-11-06 21:34:33 +00:00