Commit Graph

877 Commits

Author SHA1 Message Date
Dave Airlie c2fbeb7ca0 radv: add GFX9 cache flushing support.
GFX9 needs to write event EOP to a fence buffer, allocate some
space for this, and just write an ever increasing number to it,
this isn't exactly what radeonsi does, but it seems to work.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 09:43:40 +10:00
Dave Airlie b11c4a5546 radv: add texture descriptor/fmask/cmask support for GFX9
This adds gfx9 support for the texture descriptor along
with the fmask/cmask allocation routines.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 09:43:37 +10:00
Dave Airlie 87b3799493 radv: add GFX9 to initialisation cmd buffer.
This just adds support for initialising some GFX9 registers,
and handles the different init for the VGT reuse reg.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 09:43:35 +10:00
Dave Airlie 98f27b9cce radv: don't setup raster_config on gfx9.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 09:43:32 +10:00
Dave Airlie 77b8aa4d95 radv: add gfx9 cp dma support.
This adds support to the CP dma code for GFX9, ported from
radeonsi.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 09:43:29 +10:00
Dave Airlie 41eba750ba radv: add gfx9 depth/stencil surface support.
This is ported from radeonsi.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 09:43:27 +10:00
Dave Airlie ac3e18916f radv: add GFX9 support for color surfaces.
This is ported from radeonsi.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 09:43:24 +10:00
Dave Airlie 0063da8393 radv: add some misc gfx9 pieces.
This just adds the strings and includes the gfx9 register defs
in some files that we need them in.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 09:43:21 +10:00
Dave Airlie a83f28d536 radv: set offchip hs param like radeonsi.
radeonsi never uses 512 here anymore.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 09:43:18 +10:00
Dave Airlie 04924c09be radv: fix typo in comment. 2017-06-06 08:59:30 +10:00
Dave Airlie 114d29e7fe radv: add a comment from radeonsi before cp dma function.
This is just copied over.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 08:44:01 +10:00
Dave Airlie da3330662f radv: remove doubled up prototype.
Must have snuck in during a rebase.
2017-06-06 08:27:35 +10:00
Dave Airlie d1a4d229ec radv: split metadata struct into legacy/gfx9 parts.
This is just ported from radeonsi.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 08:22:45 +10:00
Dave Airlie d987f90354 radv: refactor some texture descriptor state.
This just splits out some non-gfx9 bits in advance to avoid
regressions.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 08:22:42 +10:00
Dave Airlie a5d181f60b radv: refactor color surface init before gfx9.
This just moves the code around in preparation for gfx9 support.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 08:22:38 +10:00
Dave Airlie d3ab239099 radv: refactor depth/stencil state setup
In advance of GFX9 to reduce chances for regression, refactor
this code out so adding the GFX9 changes will be more obvious.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 08:22:33 +10:00
Dave Airlie b50ab49723 radv: use radv_foreach_stage in a couple of places.
This just collapses a few per-stage things into a loop,
shouldn't affect anything.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-06 08:20:22 +10:00
Nicolai Hähnle df30123794 radv: use ac_compute_surface
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:44:30 +10:00
Dave Airlie 607e61c40e radv: prepare fmask surface creation
The old code copied over all the surface info from the image
surface, we only want some bits of it, and to modify the flags.

This prevents a regression in dEQP-VK.api.copy_and_blit.resolve_image.*
and others in the subsequent switch to ac_compute_surface.

v2:
- also disable opt4Space in radv_amdgpu_surface, so that we can
  apply this patch separately *before* switching to ac_compute_surface
  and hopefully avoid intermittent regressions (Nicolai)

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-06-05 10:44:24 +10:00
Nicolai Hähnle 8354f287db radv: use amdgpu_addr_create
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:44:22 +10:00
Nicolai Hähnle 40e94847a5 radv: stop using radv_amdgpu_winsys::family
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:44:18 +10:00
Nicolai Hähnle bd4493b169 radv: use ac_gpu_info
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:44:15 +10:00
Nicolai Hähnle eeb075d662 radv: remove radeon_info::name
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:44:13 +10:00
Nicolai Hähnle dfc06d2fac radv: use ac_surface data structures
This is mostly mechanical changes of renaming types and introducing
"legacy" everywhere.

It doesn't use the ac_surface computation functions yet.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:44:09 +10:00
Nicolai Hähnle 543de22f4b radv: rename radeon_surf::bo_{size,alignment} to surf_{size,alignment}
To match radeonsi / ac_surface.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:44:05 +10:00
Nicolai Hähnle 8417c21d0a radv: remove unused RADEON_SURF_HAS_SBUFFER_MIPTREE
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:44:02 +10:00
Nicolai Hähnle e156eaedb4 radv: remove radeon_surf_level::nblk_z
We're not using thick tiling modes, so we can just derive the value
ourselves.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:43:59 +10:00
Nicolai Hähnle 34b7fb47b6 radv: remove radeon_surf_level::dcc_enabled
Like radeonsi; replace with radeon_surf::num_dcc_levels.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:43:56 +10:00
Nicolai Hähnle 59f72e158a radv: remove radeon_surf_level::pitch_bytes
Like radeonsi. This saves memory, and the information can easily be
recomputed on the fly where necessary.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:43:53 +10:00
Nicolai Hähnle a12d288bff radv: add surface helper variable in radv_GetImageSubresourceLayout
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:43:50 +10:00
Nicolai Hähnle 388d36dfd1 radv: fewer than 8 RBs are possible
This fixes the subsequent assertion on Bonaire.

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:43:47 +10:00
Nicolai Hähnle e07d5c7296 ac/surface/gfx6: explicitly support S8 surfaces
This is needed by radv for dEQP-VK.renderpass.simple.stencil

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 10:43:29 +10:00
Dave Airlie 72f0830ecd ac/nir: set workgroup size attribute to correct value.
This ports: 55445ff189 from radeonsi

    radeonsi: tell LLVM not to remove s_barrier instructions

    LLVM 5.0 removes s_barrier instructions if the max-work-group-size
    attribute is not set. What a surprise.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-05 01:37:44 +01:00
Dave Airlie 68c812f699 ac: add new helper function to add a integer target dependent function attr.
This is needed to add the max workgroup size attribute.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-05 01:37:29 +01:00
Dave Airlie 4ba2e6cbfa radv: add external memory support.
This adds support for exporting 2D images, to an
opaque fd.

This implements the:
VK_KHX_external_memory_capabilities
VK_KHX_external_memory
VK_KHX_external_memory_fd

extensions.

These are used by SteamVR, we should work with anv
to decide if we should ship these under an env
var or something.

v2 (Bas): - Don't expose the semaphore ext without implementing it.
          - Only export the capabilities ext as instance ext.
          - Implement radv_GetPhysicalDeviceExternalBufferPropertiesKHX.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
2017-06-05 02:26:43 +02:00
Bas Nieuwenhuizen d515b420dd radv: Add VkPhysicalDeviceIDProperties support.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 02:26:43 +02:00
Bas Nieuwenhuizen d513473cc1 radv: Add support for external queue family.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-05 02:26:43 +02:00
Dave Airlie a935cd926b radv/formats: reverse how the image format properties KHR2 is handled
This just aligns with how anv does it.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-05 01:03:30 +01:00
Bas Nieuwenhuizen 4415a46be2 radv: Dirty all descriptors sets when changing the pipeline.
Sets could have been ignored during previous descriptor set flush
due to the shader not using them and therefore no SGPR being assigned.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: ae61ddabe8 "radv: move userdata sgpr ownership to compiler side."
2017-06-03 22:24:37 +02:00
Bas Nieuwenhuizen 5fb8bb3065 radv: Set both compute and graphics SGPRS on descriptor set flush.
We clear the descriptors_dirty array afterwards, so the SGPRs for
the other pipeline don't get updated on the flush for that other
draw/dispatch, so we have to make sure we do it immediately.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: ae61ddabe8 "radv: move userdata sgpr ownership to compiler side."
2017-06-03 22:24:37 +02:00
Dave Airlie bcae327469 radv: realign cp dma code with radeonsi
This reworks this code to be like radeonsi, which will make it
easier to add GFX9 support to it in the future.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-02 12:49:11 +10:00
Dave Airlie 745aa17093 radv: bump some base addresses to 64-bits.
For GFX9 these will be needed to be 64-bit, so bump them early,
to avoid it causing any wierdness later.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-02 12:49:01 +10:00
Dave Airlie ad61eac250 radv: factor out eop event writing code. (v2)
In prep for GFX9 refactor some of the eop event writing code
out.

This changes behaviour, but aligns with what radeonsi does,
it does double emits on CIK/VI, whereas previously it only
did this on CIK.

v2: bump the size checks.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-02 12:48:56 +10:00
Dave Airlie 7205431e73 radv: factor out si_emit_wait_fence code.
This code was in a few places, consolidate into one.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-02 12:48:20 +10:00
Bas Nieuwenhuizen af2844116f radv: Revert HTILE reset word to 0xFFFFFFFF.
0x30f regressed mad max.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Fixes: df91abfe5a "radv: Use correct clear words for HTILE."
2017-05-31 23:55:13 +02:00
Bas Nieuwenhuizen 18efb404cf radv: Reserve space for descriptor and push constant user SGPR setting.
flush_compute_state doesn't reserve a large chunk, so these need their own reservation.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
2017-05-29 22:30:39 +02:00
Leo Liu ea79c0440c amd/common: set vcn dec as hw decode as well
Recommit after issue resolved by the previous patch.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-05-29 14:32:29 -04:00
Leo Liu 0abc24723c amd/common: add vcn dec ip info query for amdgpu version 3.17
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-05-29 14:32:29 -04:00
Emil Velikov 2b6ad89d86 radv: automake: list shared libraries after the static ones
Analogous to previous commit - the compiler can discard xcb + wayland
libs, since there is no user (the static libraries) before it on the
command line.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
2017-05-29 16:42:44 +01:00
Marek Olšák e019ea8f4b radeonsi: move building llvm.SI.load.const into ac_build_buffer_load
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-29 01:52:16 +02:00