bf49d4a084
freedreno/ir3: Enable load/store vectorization for SSBO access, too.
...
Saves a few ldib/stib instructions in gfxbench vk-5-normal compute shaders
by grouping vec4 accesses together.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16616 >
2022-06-01 22:19:44 +00:00
6e087f96c9
nir_lower_mediump: Drop assertion about not containing movs.
...
A 1D texture operation may need to do a mov to turn a reference to a
channel of an SSA value into a scalar value to be passed as the texture
coordinate (since texture srcs can't do swizzles). Seen in
amnesia-the-dark-descent/low/46.shader_test() for example, where a 1D
texture is used to remap each of r,g,b from a previous texture result.
Besides, the nir_op_is_vec() case will (perhaps surprisingly) look through
a mov, anyway.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16616 >
2022-06-01 22:19:44 +00:00
5f64bc7a3e
ci/turnip: Add missing xfails for a618 full VK run
...
Fixes: 836ce97f5ehttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16616 >
2022-06-01 22:19:44 +00:00
1c63a0beaf
venus: resolve AHARDWAREBUFFER_FORMAT_Y8Cb8Cr8_420 to external format
...
This is to work around ANGLE yuv support.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org >
Reviewed-by: Ryan Neph <ryanneph@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16759 >
2022-06-01 20:25:47 +00:00
bc4d42023d
pan/bi: Respect swizzles in nir_op_pack_64_2x32_split
...
Triggered a BIR validation error, which made debugging a breeze. That validation
pass (dimensionality checks) gets a lot of use, it seems :-)
Fixes:
dEQP-VK.ssbo.layout.2_level_array.std430.row_major_mat4x2_comp_access_store_cols
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16724 >
2022-06-01 20:08:42 +00:00
7831508740
panvk: Use vk_image_subresource_*_count for clears
...
This handles VK_REMAINING_* for us, instead of underflowing and clearing no
levels/layers.
Fixes dEQP-VK.api.image_clearing.core.clear_color_image.2d.linear.single_layer.*
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16724 >
2022-06-01 20:08:42 +00:00
9ddfcbfbc6
panfrost: Allow 2D AFBC on Valhall
...
2D AFBC should be working now, flip the switch. 3D AFBC needs more research to
get right, honestly it's not clear how 3D AFBC on Bifrost is working...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16800 >
2022-06-01 19:44:31 +00:00
82d3eb7f18
panfrost: Handle texturing from AFBC on Valhall
...
We need to pack special AFBC-specific plane descriptors instead of the generic
plane descriptor. Nothing too fancy here, though.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16800 >
2022-06-01 19:44:31 +00:00
9afa8cc555
panfrost: Support rendering to AFBC on Valhall
...
Add the required handling when packing render target and depth buffer
descriptors on Valhall. This is mostly equivalent to Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16800 >
2022-06-01 19:44:31 +00:00
c2207d27c2
panfrost: Add pan_afbc_compression_mode on Valhall
...
Map a canonical format (a hardware-independent pipe_format) to a compression
mode (Valhall-specific hardware enum defined in GenXML). To be used for packing
plane descriptors and render target descriptors when AFBC is in use on Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16800 >
2022-06-01 19:44:31 +00:00
87dcdbdad6
panfrost: Pass arch instead of dev into afbc_format
...
For callers that have a device object, it's easy to pass dev->arch instead of
dev. But this requires callers to have a reference to the device, which is
tricky for callers that only have the arch via PAN_ARCH. Pass dev->arch instead
of dev to accommodate them.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16800 >
2022-06-01 19:44:31 +00:00
2cc2f217d4
panfrost: Fix XML for AFBC header on v9
...
Misnamed field due to copy/paste fail from Bifrost.
Fixes: c011ea6c26alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16800 >
2022-06-01 19:44:31 +00:00
e596a0423b
pan/mdg: Print outmods when printing IR
...
In particular, this lets us distinguish mul_high from regular mul.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16798 >
2022-06-01 14:24:10 -04:00
a099834b97
pan/mdg: Distinguish SSA vs reg when printing IR
...
This makes it easy to match the printed IR with the indices in the NIR.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16798 >
2022-06-01 14:24:10 -04:00
520204ae18
pan/mdg: Only print 1 source for moves
...
This makes the printed IR easier to read at a glance.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16798 >
2022-06-01 14:24:10 -04:00
0ee24c46e0
pan/mdg: Only print 2 sources for ALU
...
..and assert the other sources are null. The one place this might fail in the
future is for real FMA, but we don't support that for GL.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16798 >
2022-06-01 14:24:10 -04:00
9c9db27e3c
pan/mdg: Only print masked components of swizzle
...
This matches the IR printer with the disassembler, making the output of the IR
printer much easier to parse at a glance.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16798 >
2022-06-01 14:24:10 -04:00
c9093554d0
pan/mdg: Use "<<" instead of "lsl"
...
Easier to read and consistent with C code.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16798 >
2022-06-01 14:24:10 -04:00
8c11f4809b
pan/mdg: Remove uppercase write masks
...
These do not convey any additional information, and fail to account for
shrinking. In particular, a 64-bit writemask with .keephi would fail to
disassemble and instead trip the assertion, since that would be the ZW
components. Just delete the broken code.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16798 >
2022-06-01 14:24:10 -04:00
9e4b457958
pan/mdg: Scalarize with 64-bit sources
...
Otherwise, we can get vec3 with u2u32 with 64-bit sources which we need lowered.
Since our current approach is "scalarize all 64-bit ops", we need to check for
conversions too.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16798 >
2022-06-01 14:24:05 -04:00
1d815548ab
radv, aco: Packed usub_sat/isub_sat.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13895 >
2022-06-01 17:09:25 +00:00
aa9d2d8893
radv: Enable VK_INTEL_shader_integer_functions2.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13895 >
2022-06-01 17:09:25 +00:00
55735ed728
radv: Lower 8bit isub_sat/usub_sat.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13895 >
2022-06-01 17:09:25 +00:00
4e6667ea87
radv: Lower hadd/hradd.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13895 >
2022-06-01 17:09:25 +00:00
cc3f03b757
radv: Lower mul_32x16.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13895 >
2022-06-01 17:09:25 +00:00
bfc25d6ec9
nir: Add optional lowering for mul_32x16.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13895 >
2022-06-01 17:09:25 +00:00
83f51212c1
ac/llvm: Implement uclz.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13895 >
2022-06-01 17:09:25 +00:00
8671b866bf
ac/llvm: Implement usub_sat and isub_sat.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13895 >
2022-06-01 17:09:25 +00:00
d404f1964c
aco: Implement isub_sat.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13895 >
2022-06-01 17:09:25 +00:00
faa2a89487
aco: Implement usub_sat.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13895 >
2022-06-01 17:09:25 +00:00
529ec3d7dc
aco: Implement uclz.
...
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13895 >
2022-06-01 17:09:25 +00:00
79e266fffc
ir3: Force late-z if FS has global store/atomic
...
No known tests are fixed.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16816 >
2022-06-01 16:30:36 +00:00
5067a26f44
pan/bi: Use flow control lowering on Valhall
...
Logically at the same part of the compile pipeline as clause scheduling on
Bifrost. Lots of similarities, too. Now that we generate flow control only as a
late pass, various hacks in the compiler are no longer necessary and are
dropped.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
a394c32cd2
pan/va: Unit test flow control merging
...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
4b06e7f5b6
pan/va: Unit test flow control insertion
...
Test that we correctly track the scoreboard, helper invocations, reconvergence,
and ends and insert NOPs to effect this expected flow control.
As the pass inserts NOPs but does not otherwise modify the shader, this is easy
to test with well-defined behaviour of the pass.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
0fa9204049
pan/va: Respect assigned slots
...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
492f4055dd
pan/va: Assign slots roundrobin
...
This should reduce false dependencies with asynchronous instructions.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
aa7393f81a
pan/va: Add flow control merging pass
...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
03d8439c0a
pan/va: Terminate helper threads
...
On Bifrost, to terminate helper threads we set the td bit on the clause. On
Valhall, we need to use the .discard flow control. Extend the flow control NOP
insertion to insert NOP.discard where necessary to terminate helper threads.
This should reduce wasted work in fragment shaders.
This requires fairly involved data flow analysis, but the handling here should
be optimal.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
41b39d6d5d
pan/va: Do scoreboard analysis
...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
7e3b9cf754
pan/va: Add pass to insert flow control
...
To set flow control modifiers correctly and efficiently, we need a pass that
runs after register allocation and scheduling, but before packing. Add such a
pass.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
82b1897900
pan/bi: Print flow control on instructions
...
This helps debug the flow control lowering passes on Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
c0180f6bd3
pan/bi: Export helper termination analysis
...
The current helper termination analysis code is hardwired for clauses, so it
won't work for Valhall. However, the bulk of it is dataflow analysis which is
portable between Bifrost and Valhall. Export the interesting bits so we can
reuse them on Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
7bb635316b
pan/bi: Export bi_block_add_successor
...
For use in unit tests that need to create blocks.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
d7c6b7c9d2
pan/bi: Extract bit_block helper
...
Convenience for unit tests which need to create multiple blocks, to test global
passes.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
b0edd92156
pan/bi: Add a trivial ctx->inputs for unit tests
...
So we can unit test the flow control insertion which needs to gate some
behaviour on not being in a blend shader.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
218148d38a
pan/bi: Add ASSERT_SHADER_EQUAL macro
...
Useful for whole-program unit tests.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
4627cd99de
pan/bi: Preserve flow control for non-psiz variant
...
Otherwise we will get INSTR_INVALID_ENC faults when deleting the final STORE.end
instruction, after we rework our flow control code.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
c846e0812b
pan/bi: Add slot to bi_instr
...
For better handling of message-passing instructions.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
616df0e97d
pan/bi: Extend bi_scoreboard_state for finer tracking
...
We need to insert dependencies for varyings and memory access. Currently, the
Bifrost scoreboarding pass just treats these as barriers, but this is too heavy
handed. Extend the scoreboard data structure so we can do better.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16804 >
2022-06-01 16:14:38 +00:00
Emma Anholt