Commit Graph

69 Commits

Author SHA1 Message Date
Emma Anholt 4ab489a0b7 freedreno: Update RB_DBG_ECO_CNTL/RB_DBG_ECO_CNTL_blit.
On blob v512.490, using WRAP_GPU_ID to fake GPU versions, I see 0x41 used
everywhere, except for BLIT_OP_SCALE on a630.  Define the magic number in
dev info so it can be reused in the two places that set the
non-BLIT_OP_SCALE value.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19794>
2022-11-19 18:28:27 +00:00
Chia-I Wu 6bc1fd1862 freedreno: add has_separate_chroma_filter to fd_dev_info
The blob driver does not support
VK_FORMAT_FEATURE_SAMPLED_IMAGE_YCBCR_CONVERSION_SEPARATE_RECONSTRUCTION_FILTER_BIT
before a6xx_gen3.  It still sets CHROMA_LINEAR bit according to
chromaFilter, but the bit has no effect before a6xx_gen3 (confirmed on
a618 with blob version 512.490.0).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19609>
2022-11-18 00:29:09 +00:00
Jami Kettunen 8a5de0b6cf freedreno/pm4: Use unsigned instead of uint to fix musl build
Fixes the following error I noticed when building against aarch64 with
musl libc:

  In file included from ../src/freedreno/decode/crashdec.h:38,
                   from ../src/freedreno/decode/crashdec.c:40:
  ../src/freedreno/common/freedreno_pm4.h:104:15: error: unknown type name 'uint'
    104 | static inline uint
        |               ^~~~
  ../src/freedreno/common/freedreno_pm4.h:105:25: error: unknown type name 'uint'; did you mean 'int'?
    105 | pm4_calc_odd_parity_bit(uint val)
        |                         ^~~~
        |                         int

Signed-off-by: Jami Kettunen <jami.kettunen@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19665>
2022-11-12 00:01:31 +00:00
Mark Collins d151ba5c30 tu: Implement utrace CS marker support
Adds support for emitting utrace markers into the CS, this allows
for useful debug information that can be decoded from a recorded
command stream.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18271>
2022-11-11 13:50:57 +00:00
Connor Abbott aab81d660a freedreno: Make BIT() 64-bit
In turnip we were using this a lot with the dynamic state enum, and
we're running out of space there because we're needing to add more and
more dynamic states that don't correspond to draw states. Make it
64-bit-safe so we don't need to rewrite everything in turnip. In the
case where the thing being operated on is 32-bit the compiler can
usually optimize it away, as can be seen with the release build size
before and after:

before:
   text    data     bss     dec     hex filename
5404913  293592   22744 5721249  574ca1 /home/cwabbott/build/mesa-release/lib64/libvulkan_freedreno.so
   text    data     bss     dec     hex filename
13981320         498550  205000 14684870         e012c6 /home/cwabbott/build/mesa-release/lib64/dri/msm_dri.so

after:
   text    data     bss     dec     hex filename
5404969  293592   22744 5721305  574cd9 /home/cwabbott/build/mesa-release/lib64/libvulkan_freedreno.so
   text    data     bss     dec     hex filename
13981320         498550  205000 14684870         e012c6 /home/cwabbott/build/mesa-release/lib64/dri/msm_dri.so

In the end the only changes is an additional ~50 bytes of text in
turnip.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18912>
2022-11-03 21:59:42 +00:00
Joshua Ashton 0f770caa23 freedreno: Disable 8bpp_ubwc on a6xx gen2
Fixes text corruption in VSCode on a680.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18779>
2022-09-23 16:08:33 +00:00
Danylo Piliaiev c22444ebcc freedreno: Add all variable magic regs to device-info tables
There are more magic regs which have different values between GPU
subgenerations than we specified.

The updated list and values where obtained by using libwrapfake
with v631 blob and dEQP-VK.draw.renderpass.basic_draw.draw.triangle_list.1
vk cts test.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18229>
2022-09-06 16:18:58 +00:00
Danylo Piliaiev df51e96c33 freedreno: Name more *_DBG_ECO_CNTL regs
There is known pattern of *DBG_ECO_CNTL being right before
*_ADDR_MODE_CNTL, name such regs that we are sure about.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18229>
2022-09-06 16:18:58 +00:00
Rob Clark 8e8b7562c6 freedreno: Extract common helper macros
De-duplicate some macros that had been copy/pasta'd around, etc.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
2022-08-02 23:46:15 +00:00
Konrad Dybcio d3b38213e5 freedreno: Enable A619
Enable A619 as found in various SKUs of the SM Lagoon SoC, such as
SM6350 and SM7225.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17495>
2022-07-21 00:16:32 +00:00
Danylo Piliaiev 7b0fcd8932 turnip: Disable LRZ fast-clear for gen1 and gen2
LRZ fast-clear works on all gens, however blob disables it on
gen1 and gen2. We also elect to disable fast-clear on these gens
because for close to none gains it adds complexity and seem to work
a bit differently from gen3+. Which creates at least one edge case:
if first draw which uses LRZ fast-clear doesn't lock LRZ direction
the fast-clear value is undefined.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6829

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17599>
2022-07-20 02:58:44 +00:00
İlhan Atahan 4bd128f748 Add Adreno 616 and 620 to use turnip on these GPU's .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17441>
2022-07-10 15:36:52 +00:00
Rob Clark bc6f1afc79 freedreno: Add pkt4 assert
Add assert to catch places where we overflow max PKT4 size

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17317>
2022-07-03 23:20:46 +00:00
Danylo Piliaiev 4b5f0d98fd tu: Overhaul LRZ, implement on-GPU dir tracking and LRZ fast-clear
On-GPU LRZ direction tracking allows LRZ to support secondary cmdbufs,
reusing LRZ between renderpasses, and in future to support LRZ when
VK_KHR_dynamic_rendering is used.

With on-gpu tracking we have to be careful keeping LRZ state in sync
with underlying depth image, which means we should invalidate LRZ
when underlying image is changed or the view of image is different
from previous renderpass.

All of this resulted in LRZ logic being thinly spread through the code,
making it hard to understand. So most of it was moved to tu_lrz.c.

For more details on past and new LRZ features see comment at the
top of tu_lrz.c.

Note about blob:
- Blob is much more happy to do LRZ_FLUSH, it flushes at the start
  of the renderpass, after binning, and at the end of the renderpass.
- Blob seem not to care about changes in depth image done via
  vkCmdCopyImage.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6347

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16251>
2022-06-28 17:23:16 +00:00
Emma Anholt 086faecbba turnip: Document some fields about resolves.
I noticed the unk12 pattern, and cwabbott and danylo had figured out some
more details.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17126>
2022-06-21 19:40:58 +00:00
Rob Clark 7292b35da0 freedreno/devices: Add another SKU
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16477>
2022-05-12 22:12:24 +00:00
Danylo Piliaiev 10734fb748 turnip: enable has_ccu_flush_bug workaround for a660
It seems that a660 has the same bug. Without the workaround there
are a lot of flakes with depth-stencil tests, e.g. in:
 dEQP-VK.pipeline.extended_dynamic_state.*
 dEQP-VK.renderpass.depth_stencil_write_conditions.*
 dEQP-VK.pipeline.stencil.format.d24_unorm_s8_uint.states.*

Or guaranteed failures like of:
 dEQP-VK.pipeline.render_to_image.core.2d.huge.width.r8g8b8a8_unorm_d32_sfloat_s8_uint

Enabling the workaround fixes all of them.

cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15548>
2022-03-29 08:34:18 +00:00
Rob Clark 4dc406c748 freedreno: Update chip-ids
Counterpoint to https://patchwork.freedesktop.org/series/98772/

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14506>
2022-01-13 05:26:11 +00:00
Rob Clark 785a324deb freedreno: Handle wildcard fuse-id in device matching
A future kernel update will add fuse-id in the upper bits of the
chip_id.  Do avoid breaking device matching, add a way to include
a wildcard/fallback fuse-id.  (Note that this only effects un-
released devices.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14506>
2022-01-13 05:26:11 +00:00
Rob Clark 6b8e3aeeb7 freedreno: Rearrange dev_id_compare() logic
We're going to need to add a couple more cases.  Let's split up the
existing two cases first, rather than piling on more logic to a single
expression.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14506>
2022-01-13 05:26:11 +00:00
Rob Clark 9176e27dd2 freedreno: Small dev_id_compare() cleanup
We don't really treat the two arguments identically, so rename them to
make it clear which one is the device id coming from kernel, and which
one is the reference id from the fd_dev_recs table.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14506>
2022-01-13 05:26:11 +00:00
Danylo Piliaiev d77bfc117c tu,ir3: Implement VK_KHR_shader_integer_dot_product
- gen4 - has dp4acc and dp2acc, dp4acc is used to implement
  4x8 dot product.
- gen3 - has dp2acc, in OpenCL blob uses dp2acc for dot product
  on both get3 and gen4.
- gen2 - unknown, lower everything.
- gen1 - no dp2acc, lower everything. OpenCL blob doesn't advertise
  cl_qcom_dot_product8 but still generates code for it.
  The assembly is more verbose and uses yet to be documented
  mad32.u16 instruction.

Passes:
 dEQP-VK.spirv_assembly.instruction.compute.opsdotkhr.*
 dEQP-VK.spirv_assembly.instruction.compute.opudotkhr.*
 dEQP-VK.spirv_assembly.instruction.compute.opsudotkhr.*
 dEQP-VK.spirv_assembly.instruction.compute.opsdotaccsatkhr.*
 dEQP-VK.spirv_assembly.instruction.compute.opudotaccsatkhr.*
 dEQP-VK.spirv_assembly.instruction.compute.opsudotaccsatkhr.*

Only packed 4x8 unsigned and mixed versions are accelerated.
However in theory we should be able to do better for signed version
than current NIR lowering.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13986>
2022-01-10 13:21:24 +02:00
Danylo Piliaiev ded51fd39e ir3: Use getfiberid for SubgroupInvocationID on gen4
Since it requires (ss) categorize it as is_sfu() and not is_mem().

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13817>
2021-12-07 20:45:53 +00:00
Danylo Piliaiev e63ffc2f04 freedreno,tu: Limit the amount of instructions preloaded into icache
Inferring from blob's cmdstream the size of shader instruction
cache for:
- a630 is 64
- a650 is 128
- a660 is 128

On a650 and a660 gpu could hang if we exceed the limit. Though
it is not reproducible with computerator or a single amber
test. Also while blob limits the size to 128 - Turnip still
hangs with it but does not hang with the limit of 127.

On a630 there seem to be no hang when limit is exceeded.

Fixes the hang of compute shader in Alien Isolation on a650/a660.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14044>
2021-12-07 13:48:35 +00:00
Connor Abbott b1fe85e38c freedreno, turnip: Set TPL1_DBG_ECO_CNTL better
Match the blob better here. Note that the value of 0x1000000 for a650
comes from the Vulkan blob, and it's required to fix cubic filtering
even though the GLES driver doesn't set it (and doesn't support cubic
filtering).

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5261
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12929>
2021-09-21 09:08:20 +00:00
Rob Clark 68d4d09b56 freedreno: Add info->a6xx.has_shading_rate
@flto noticed these registers seem to be related to GL_QCOM_shading_rate

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12856>
2021-09-20 19:13:25 +00:00
Marijn Suijten 07e1233c61 freedreno: Enable Adreno 508, 509 and 512
These GPUs attained kernel support in:
https://git.kernel.org/torvalds/c/1d832ab30ce64abe30571bc12931a296a8a27c4d

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12874>
2021-09-16 18:51:40 +00:00
Connor Abbott e43797ab13 freedreno, turnip: Disable 8bpp UBWC on a650
While it doesn't immediately hang like on a660, it seems to be buggy and
the blob disables it.

This fixes a bunch of r8_* dEQP-VK tests, which seem to pass
individually but don't work when run after other tests. For example this
fixes failures running dEQP-VK.pipeline.sampler.*.r8_uint*.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12830>
2021-09-14 11:11:39 +00:00
Rob Clark 74d1052537 freedreno/a6xx: Fix a6xx gen4 compute shaders
I believe the addition of these new regs is related to the changes made
for LPAC ring, so let's key off of that.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12497>
2021-08-25 15:24:19 +00:00
Rob Clark 8dff5356ff freedreno/common: Fix comment typo
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12497>
2021-08-25 15:24:19 +00:00
Connor Abbott 47996b951e tu: Add a650-specific CCU flush workaround
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12475>
2021-08-20 18:03:26 +00:00
Danylo Piliaiev bb4db22ff4 turnip: apply workaround for depth bounds test without depth test
On some GPUs when:
- depth bounds test is enabled
- depth test is disabled
- depth attachment uses UBWC in sysmem mode
GPU hangs. As a workaround we should enable z test. That's what blob
is doing for a630. And since we enable z test we should make it always pass.

Blob doesn't emit this workaround on a650 and a660. Untested on a640.

Fixes:
 dEQP-VK.pipeline.extended_dynamic_state.two_draws_static.depth_bounds_test_disable
 dEQP-VK.pipeline.extended_dynamic_state.two_draws_dynamic.depth_bounds_test_disable
 dEQP-VK.dynamic_state.ds_state.depth_bounds_1

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12407>
2021-08-19 10:25:58 +00:00
Rob Clark 89ab2a7b6f freedreno: Add a680 support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12041>
2021-08-17 23:24:23 +00:00
Connor Abbott 2b134a8c0c freedreno/a6xx: Add new register fields
Also use them in drivers and delete some comments that are now
irrelevant.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12340>
2021-08-13 08:58:56 +00:00
Rob Clark 4e28dfe58e freedreno: Device matching based on chip_id
Add support for device matching based on chip_id instead of gpu_id, to
handle newer GPUs

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
2021-08-06 18:51:50 +00:00
Rob Clark 7806843866 freedreno/all: Introduce fd_dev_id
Move away from using gpu_id as the primary means to identify which
adreno we are running on, as future GPUs (starting with 7c3) stop
providing a gpu_id as a new naming scheme is introduced.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
2021-08-06 18:51:50 +00:00
Rob Clark 7a11cc42e7 freedreno: Move generated device table to .h
We only need it in a single .c file, so we can make the device table
static.  Also rename the struct for device table entries, as I want
to re-use the name 'fd_dev_id'

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
2021-08-06 18:51:50 +00:00
Danylo Piliaiev 53d4485a02 freedreno: fix wrong tile aligment for 3 CCU gpu
Fixes: 78c8a8af80 "freedreno: Generate device-info tables at build time"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5060

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11928>
2021-07-16 15:02:27 +00:00
Rob Clark 86f09b14df freedreno+turnip: Add a6xx gen4 support
This adds support for a660 and a635.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
2021-07-14 01:58:00 +00:00
Rob Clark 7c7722304b freedreno+turnip: Get device name from device-info table
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
2021-07-14 01:58:00 +00:00
Rob Clark a4559c9550 freedreno+turnip: Add has_8bpp_ubwc
Newer a6xx devices seem to drop 8b/pixel UBWC support.

The turnip part was adapted from Jonathans patch on !10892

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
2021-07-14 01:58:00 +00:00
Rob Clark e552784e68 freedreno+turnip: Add has_cp_reg_write
Newer a6xx devices drop this packet from the sqe firmware, and use
direct (pkt4) register writes instead for the few cases that previously
used CP_REG_WRITE.

The turnip part was adapted from Jonathans patch on !10892

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
2021-07-14 01:58:00 +00:00
Rob Clark f74d0bf05e turnip: Get has_sample_locations from fd_dev_info
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
2021-07-14 01:58:00 +00:00
Rob Clark 3f1c4a86bb turnip: Get has_tex_filter_cubic from fd_dev_info
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
2021-07-14 01:58:00 +00:00
Rob Clark 64af60cfb3 turnip: Get indirect_draw_wfm_quirk from fd_dev_info
At some point we might want to change this to minimum fw version, but
for now it can be a bool.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
2021-07-14 01:58:00 +00:00
Rob Clark 06000f42ed turnip: Get storage_16bit from fd_dev_info
Removing more gpu_id checks that will become bogus as we add more a6xx.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
2021-07-14 01:58:00 +00:00
Rob Clark f4cfb5a61e freedreno/ir3: Get reg_size_vec4 from fd_dev_info
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
2021-07-14 01:58:00 +00:00
Rob Clark 4335f47f41 freedreno/ir3: Get tess_use_shared from fd_dev_info
A step towards getting rid of checks for gpu_id sprinkled around.
Checking major generation is ok, but checking for == or >= a specific
gpu_id is going to start getting messy as we add more a6xx.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
2021-07-14 01:58:00 +00:00
Rob Clark 78c8a8af80 freedreno: Generate device-info tables at build time
This way we can make the tables const.  At the same time, for a6xx, this
introduces a "sub-generation template" to reduce the copy/paste for
parameters which are keyed to the sub-generation.  It also explicitly
lists every supported GPU, to get rid of duplicate lists of supported
gpus between the device-info and drivers.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
2021-07-14 01:58:00 +00:00
Rob Clark 0eda0188aa freedreno: Rename *_dev_info
Everywhere else symbols/types/etc are shortend to "fd_*", so lets do the
same here for consistency.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
2021-07-14 01:58:00 +00:00