Commit Graph

2706 Commits

Author SHA1 Message Date
Leo Liu
448c716358 ac/surface/tests: add the test for ADDR3_256B_2D
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29541>
2024-06-11 12:29:11 -04:00
Leo Liu
59e813d953 ac/surface: add GFX12 256B tile mode for video
With VCN5, the DPB buffer uses gfx12 tile/swizzle mode.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29541>
2024-06-11 12:29:11 -04:00
Samuel Pitoiset
a373ba92c3 amd: add a common implementation for SQTT using PM4
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
2fab42ad2e amd: mark more registers that need RESET_FILTER_CAM in PM4
For SQTT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
0c08673656 amd: allow to emit privileged config registers in PM4
For SQTT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
b82e5c8da8 ac,radv,radeonsi: add more parameters to ac_sqtt
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
2024-06-11 06:46:55 +00:00
Samuel Pitoiset
155399d03b ac,radv: add a helper for SQTT control register
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29499>
2024-06-11 06:46:55 +00:00
Ruijing Dong
8cd53d95fe radesonsi/vcn: update vcn4 tile processing logic
Vcn4 tile number calculation doesn't consider
some input case, which could result in output
bitstream corruption, this fixed the issue.

Not using the number_of_tiles directly but from
calculation. Also change to re-use some macros
from local vcn_5_0.c to ac_vcn_enc.h header file.

Updated vcn4 spec_misc_av1 ip package.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29556>
2024-06-10 13:12:20 +00:00
Georg Lehmann
05ca6e2478 amd/common: set COMPUTE_STATIC_THREAD_MGMT_SE2-3 correctly on gfx10-11
There is a hole between SE1 and SE2 occupied by COMPUTE_TMPRING_SIZE.

Fixes: 3c8b48e310 ("ac,radeonsi: add a function to initialize compute preambles")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29622>
2024-06-08 19:18:53 +00:00
Marek Olšák
dc113c418d ac/nir: import the dispatch logic for the universal compute clear/blit shader
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917>
2024-06-08 05:48:11 +00:00
Marek Olšák
6b15e45908 ac/nir: import the universal compute clear/blit shader
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917>
2024-06-08 05:48:11 +00:00
Marek Olšák
1becc6953c ac/nir: import the MSAA resolving pixel shader from radeonsi
It has a lot of options for efficiency.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917>
2024-06-08 05:48:11 +00:00
Marek Olšák
1b9ce2625f ac/nir/lower_ngg: don't use gfx12 xfb defs outside their basic block on gfx11
Move the defs after nir_pop_if and phis and inside the gfx12 branch.

Fixes: 1ea96a47cd - ac/nir/lower_ngg: use voffset in global_atomic_add for xfb

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29564>
2024-06-08 00:11:18 -04:00
Marek Olšák
2ea3cb054b ac/surface: pass the correct addrlib handle to Addr3GetPossibleSwizzleModes
Fixes: d22564d29c - ac/surface: add gfx12

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29564>
2024-06-08 00:11:15 -04:00
Rhys Perry
167b6cac45 ac: stop using radeon_info for ac_get_hw_cache_flags
This makes the function easier to use when radeon_info is not available.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29243>
2024-06-07 13:22:43 +00:00
Samuel Pitoiset
3c8b48e310 ac,radeonsi: add a function to initialize compute preambles
Preambles are very similar between RADV and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29452>
2024-06-06 20:26:47 +00:00
Samuel Pitoiset
428601095c ac,radeonsi import PM4 state from RadeonSI
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29452>
2024-06-06 20:26:47 +00:00
Rhys Perry
69b7fcd775 ac/nir: support lowering of sub-dword push constants
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29480>
2024-06-06 17:52:04 +00:00
Rhys Perry
26c981b2b8 ac/nir: skip subgroup_id/local_invocation_index lowering for gfx12
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29466>
2024-06-06 14:26:52 +00:00
Samuel Pitoiset
e2db42298d amd/common: add MIN_LOD for texture descriptors on GFX12
RADV will need that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29321>
2024-06-06 10:15:10 +00:00
Samuel Pitoiset
8cb2cad434 ac,radv,radeonsi: add a function to build texture descriptors
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29321>
2024-06-06 10:15:10 +00:00
Marek Olšák
fbc237037c radeonsi/gfx12: fix GPU deadlocks due to query result incoherency
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák
060d5dacfd ac: add gfx12 DCC shared code
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák
1ea96a47cd ac/nir/lower_ngg: use voffset in global_atomic_add for xfb
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák
b002564633 ac/nir/lower_ngg: use global_atomic_amd to fix gfx12 streamout
The intrinsics are lowered before this is called.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák
5db194b1d1 ac/descriptors: fix gfx12 regressions
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Samuel Pitoiset
aa02cd2a1b ac,radeonsi: set COLOR_SW_MODE for mutable CB surfaces on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Georg Lehmann
a3f77e09a1 ac: set has_pack_32_4x8
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28882>
2024-06-04 17:00:29 +00:00
Ruijing Dong
c1e52baf30 radeonsi/vcn: enable roi feature for vcn5
Compared to vcn4, qp map unit is a 32bit number,
vcn5 uses 16bit integer number, in addition to
that it has 2 unit alignment requirement(32 bit
alignment) and each qp value needs left shift 7 bits.

Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Ruijing Dong
6d90a1baa5 radeonsi/vcn: add header files for vcn5 av1 tile
Update header files for av1 tile and delta qp.
vcn5 needs driver and applcation to manage that
while in vcn4 they are managed in FW.

Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Ruijing Dong
80d3e84b81 radeonsi/vcn: add cdef modes for vcn5 encoding
default mode is the cdef id is managed by FW.
explicit mode is using external cdef id.

Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Timur Kristóf
2cf7f282df ac/nir/tess: Adjust TCS->TES output mapping for linked shaders.
Instead of relying on driver locations, let's use a prefix sum
of the inputs that the TES reads.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29436>
2024-05-30 12:28:51 +00:00
Samuel Pitoiset
78b4d356f3 ac,radv,radeonsi: add ac_gpu_info::has_tc_compatible_htile
It's apparently not supported on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417>
2024-05-30 11:05:03 +00:00
Samuel Pitoiset
94a6eb20f9 amd/common: define SDMA v7.0 for GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417>
2024-05-30 11:05:03 +00:00
Konstantin Seurer
432f3eb9ca radv/rt: Track ray_launch_size reads
Totals from 33 (8.71% of 379) affected shaders:
Instrs: 1434025 -> 1433988 (-0.00%); split: -0.01%, +0.00%
CodeSize: 7578824 -> 7578472 (-0.00%); split: -0.01%, +0.00%
Latency: 9241632 -> 9241639 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 3407014 -> 3407049 (+0.00%); split: -0.00%, +0.00%
VClause: 40399 -> 40391 (-0.02%)
SClause: 37755 -> 37760 (+0.01%); split: -0.04%, +0.05%
Copies: 169588 -> 169567 (-0.01%); split: -0.04%, +0.02%
PreSGPRs: 4323 -> 4319 (-0.09%)
VALU: 940500 -> 940484 (-0.00%); split: -0.00%, +0.00%
SALU: 220508 -> 220509 (+0.00%); split: -0.03%, +0.03%

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619>
2024-05-28 12:23:45 +00:00
Konstantin Seurer
7ba8fccad3 radv/rt: Track ray_launch_id reads
We can expect the z-component to be unused most of the times. Avoid
preserving it in those cases.

Totals from 94 (24.80% of 379) affected shaders:
MaxWaves: 916 -> 935 (+2.07%)
Instrs: 3316697 -> 3318357 (+0.05%); split: -0.06%, +0.11%
CodeSize: 17618704 -> 17616680 (-0.01%); split: -0.09%, +0.08%
VGPRs: 11632 -> 11520 (-0.96%)
SpillSGPRs: 1139 -> 1205 (+5.79%); split: -0.35%, +6.15%
Latency: 22595907 -> 22598225 (+0.01%); split: -0.15%, +0.16%
InvThroughput: 7036479 -> 6923740 (-1.60%); split: -1.74%, +0.14%
VClause: 104325 -> 104361 (+0.03%); split: -0.16%, +0.19%
SClause: 83920 -> 83925 (+0.01%); split: -0.08%, +0.08%
Copies: 328140 -> 330687 (+0.78%); split: -0.27%, +1.05%
Branches: 134521 -> 134541 (+0.01%); split: -0.01%, +0.02%
PreSGPRs: 8753 -> 8806 (+0.61%)
PreVGPRs: 10984 -> 10937 (-0.43%)
VALU: 2149880 -> 2151318 (+0.07%); split: -0.08%, +0.15%
SALU: 499107 -> 499128 (+0.00%); split: -0.08%, +0.09%

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619>
2024-05-28 12:23:45 +00:00
Samuel Pitoiset
a9f4931a91 ac,radv,radeonsi: a function that sets mutable CB surface fields
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29378>
2024-05-28 08:49:53 +00:00
Samuel Pitoiset
3f7a36a9fb amd/common: add a function to initialize cb surface
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29342>
2024-05-27 17:04:26 +02:00
Samuel Pitoiset
3c5173aabf ac,radv: add a stride parameter to ac_build_attr_ring_descriptor()
For RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29385>
2024-05-27 08:17:58 +02:00
Samuel Pitoiset
bb623b6144 amd/common: add a helper to set the third word of buffer descriptor
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29385>
2024-05-27 08:17:58 +02:00
Samuel Pitoiset
003d49c0bc ac,radv,radeonsi: add a function to translate texture data format
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29301>
2024-05-24 17:04:54 +02:00
Samuel Pitoiset
7785a63fc0 amd/common: add ac_gpu_info::has_etc_support
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29301>
2024-05-24 17:04:54 +02:00
Marek Olšák
ad07ea3162 amd: enable 32B minimum DCC block size for gfx1151
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313>
2024-05-24 13:48:28 +00:00
Marek Olšák
cf4eb41540 amd: add more gfx11 APUs
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29313>
2024-05-24 13:48:28 +00:00
Samuel Pitoiset
cd5f980d51 ac,radv,radeonsi: move ZRANGE_PRECISION to mutable DS fields
The DS surfaces are now completely configured in common code.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29349>
2024-05-24 11:48:32 +00:00
Samuel Pitoiset
332a06903d ac,radv,radeonsi: a function that sets mutable DS surface fields
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29349>
2024-05-24 11:48:32 +00:00
Samuel Pitoiset
1a08fa6150 ac,radv,radeonsi: add function to get the number of ZPLANES
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29349>
2024-05-24 11:48:32 +00:00
Samuel Pitoiset
636110485f amd/common: add a function to initialize ds surface
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329>
2024-05-23 15:47:14 +00:00
Friedrich Vock
18c736bcfc radeonsi: Use max_se instead of num_se where appropriate
Scratch allocation needs to happen using max_se, otherwise there can be
hangs.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29202>
2024-05-22 10:35:01 +00:00
Samuel Pitoiset
d3b01fd95e amd/common: add new helpers to build buffer descriptors
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29268>
2024-05-22 08:31:39 +00:00