Faith Ekstrand
bb8f143749
nir: Wrap pass macros in braces
...
This makes clang-format not mess them up so bad. It's also probably a
good idea to make sure anything we declare in the macro is properly
scoped.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24382 >
2023-08-12 19:27:28 +00:00
Faith Ekstrand
4d54b423e7
nir: Don't clang-format a couple typedefs
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24382 >
2023-08-12 19:27:28 +00:00
Faith Ekstrand
8579224fe1
nir: Don't clang-format const_value helpers
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24382 >
2023-08-12 19:27:28 +00:00
Faith Ekstrand
a89fb36f6b
nir: Re-align a couple enums and add clang-format comments
...
I actually kinda care about the human-readable formatting of these
enums. Keep clang-format from messing them up.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24382 >
2023-08-12 19:27:28 +00:00
Mike Blumenkrantz
e9a5da2f4b
nir: add a filter cb to lower_io_to_scalar
...
this is useful for drivers that want to do selective scalarization
of io
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24565 >
2023-08-11 09:02:53 +00:00
Mike Blumenkrantz
550f3dc437
nir/lower_io: add a new doubles-only 64bit lowering option
...
this allows lowering only 64bit float operations for drivers that
support 64bit integers
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24565 >
2023-08-11 09:02:53 +00:00
Iago Toral Quiroga
b2de3f71dc
nir/lower_tex: use a callback to check sampler return size packing
...
The lower_tex_packing pass relies on the sampler index to access packing
information, but this is only valid for tex instructions that have sampler
state (so not txf, etc). Instead, let backends provide a callback to inform
the lowering about the packing used with a given texture instruction which
is more flexible.
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537 >
2023-08-10 07:10:00 +00:00
Alyssa Rosenzweig
91ae717d0b
nir: Remove nir_foreach_def
...
Leftover.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:30 +00:00
Alyssa Rosenzweig
42ee8a55dd
nir: Remove nir_alu_dest::write_mask
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:30 +00:00
Alyssa Rosenzweig
b23d951e96
nir: Drop nir_register
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:29 +00:00
Alyssa Rosenzweig
1c49586a1f
nir: Remove nir_{src,dest}::is_ssa
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:29 +00:00
Alyssa Rosenzweig
70c64b5d49
nir: Remove def_is_register
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:29 +00:00
Alyssa Rosenzweig
a8013644a1
nir: Drop nir_alu_src::{negate,abs}
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
c512636cf0
nir: Remove reg-only dest manipulation
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
ab0d878932
treewide: Remove more is_ssa asserts
...
Stuff Coccinelle missed.
sed -i -e '/assert(.*\.is_ssa)/d' $(git grep -l is_ssa)
sed -i -e '/ASSERT.*\.is_ssa)/d' $(git grep -l is_ssa)
+ a manual fixup to restore the assert for parallel copy lowering.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
042a3eca00
nir: Collapse some SSA checks
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
d559764e7c
nir: Remove nir_alu_dest::saturate
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
0bbf458a32
nir: Remove impl->{registers,reg_alloc}
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
5133dcebb4
nir: remove nir_{src,dest}_for_reg
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:28 +00:00
Alyssa Rosenzweig
ed018babf7
nir: Remove nir_foreach_register
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:27 +00:00
Alyssa Rosenzweig
c11c75d1a1
nir: Remove nir_index_local_regs and callers
...
With no registers seen, it is now a no-op.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:27 +00:00
Alyssa Rosenzweig
1bc05bb847
nir: Drop NIR reg create/destroy
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432 >
2023-08-03 22:40:27 +00:00
Iago Toral Quiroga
ebe66479fb
nir/lower_robustness: drop skip_ubo_0 option
...
v3dv was the only user and it no longer requires this.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24396 >
2023-08-03 06:32:40 +00:00
Alyssa Rosenzweig
17d66055ae
nir: Remove reg_intrinsics parameter to convert_from_ssa
...
All users must set it.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24450 >
2023-08-02 10:26:45 -04:00
Alyssa Rosenzweig
11a161b9b9
nir: Remove lower_vec_to_movs
...
Unused.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24450 >
2023-08-02 10:26:45 -04:00
Alyssa Rosenzweig
f218a2c3df
nir: Remove lower_to_source_mods
...
Unused.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24450 >
2023-08-02 10:26:45 -04:00
Mike Blumenkrantz
e68e612826
nir: add a helper for calculating variable slots
...
this will maybe avoid future bugs, but probably not
Reviewed-by: Connor Abbott <cwabbott0@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24163 >
2023-07-28 13:14:35 +00:00
Faith Ekstrand
29c4417fb8
nir: Add a backend_flags field to nir_tex_instr
...
In 9ffd00bcf1 ("nir_to_tgsi: Pack our tex coords into vec4
nir_tex_src_backend[12]"), Emma added a pair of back-end sources to
nir_tex_instr to allow complex lowering to be done in NIR. This adds a
tiny bit more hw-specific back-end information that a NIR lowering pass
can communicate to the back-end compiler.
While the opcode contains most of the information needed, some thing
such as the presence of offsets is currently only communicated via the
presence of specific source types in the source list. This information
is gone when the texture instruction is lowered to back-end sources.
Adding a backend_flags field fixes this by allowing the lowering pass to
communicate a small amount of side-band information if needed.
Reviewed-by: Emma Anholt <emma@anholt.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22303 >
2023-07-26 20:12:49 +00:00
Alyssa Rosenzweig
03b2c34793
nir: Remove register arrays
...
Nothing produces them any more, so remove them from NIR. This massively reduces
the size of nir_src, which should improve performance all over.
nir_src size reduced from 56 bytes -> 40 bytes (pahole results on arm64, x86_64
should be similar.)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24253 >
2023-07-21 11:25:49 +00:00
Alyssa Rosenzweig
1466014184
nir: Rename lower_locals_to_reg_intrinsics back
...
The short name is freed up.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24253 >
2023-07-21 11:25:49 +00:00
Alyssa Rosenzweig
d2c94f9e71
nir: Remove nir_lower_locals_to_regs
...
No more users, all switched to the intrinsic version.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24253 >
2023-07-21 11:25:49 +00:00
Christian Gmeiner
019e5cbd39
nir/print: print instr pass_flags
...
From time to time it can be helpful to "see" the pass_flags.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24234 >
2023-07-20 18:03:47 +00:00
Alyssa Rosenzweig
4f0f76346e
nir: Add nir_lower_tess_coord_z pass
...
Lowers tess_coord to tess_coord_xy and math. Based on ir3's version.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24159 >
2023-07-17 17:31:52 +00:00
Christian Gmeiner
9383009809
nir: rename has_txs to has_texture_scaling
...
Convert it to an opt-in for backends to prefer and use nir_load_texture_scale
instead of txs for nir lowerings.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com >
Suggested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24054 >
2023-07-12 10:03:06 +00:00
Alyssa Rosenzweig
e96a9a1b71
nir: Remove nir_lower_regs_to_ssa
...
It is now unused, as all internal producers of registers have been switched over
to intrinsics and no drivers call it.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089 >
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
61010e5255
nir: Add lower_vec_to_regs pass
...
This is a variant of nir_lower_vec_to_movs that produces register intrinsics
(store_reg with write masks) instead of masked moves.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089 >
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
aea8a70200
nir: Add intrinsics version of locals_to_regs
...
This isn't so bad. I still duplicated the pass because it makes a lot easier to
have them coexist, switch users over one by one, and then garbage collect the
old when we're done.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089 >
2023-07-12 01:34:27 +00:00
Faith Ekstrand
ae0408be1b
nir/from_ssa: Support register intrinsics
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089 >
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
36b29201fa
nir: Produce intrinsics in lower_{phis,ssa_defs}_to_regs
...
A number of passes lower SSA partially to registers, do work that would be
invalid in SSA, and then go back into SSA with nir_lower_regs_to_ssa. As a step
towards replacing nir_register with intrinsics,
the nir_lower_{phis,ssa_defs}_to_regs passes are changed to produce intrinsics
instead of nir_registers, and their callers are updated to call
nir_lower_reg_intrinsics_to_ssa instead of nir_lower_regs_to_ssa to compensate.
Jointly authored with Faith.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089 >
2023-07-12 01:34:27 +00:00
Faith Ekstrand
73e191924c
nir: Add a reg_intrinsics flag to nir_convert_from_ssa
...
It doesn't do anything yet. We leave that to the subsequent patches so we can
keep the tree-wide refactor as simple as possible.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089 >
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
bcf3a622d1
nir: Add new version of lower_regs_to_ssa
...
in the sense of operating on register intrinsics instead of nir_registers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089 >
2023-07-12 01:34:27 +00:00
Alyssa Rosenzweig
d313eba94e
nir: Add pass for trivializing register access
...
After running the pass, all register access intrinsics are guaranteed to be
"trivial" in the sense that the program is free of hazards preventing
propagating them away without inserting any copies.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089 >
2023-07-12 01:34:26 +00:00
Alyssa Rosenzweig
1d6c06e4b9
nir: Add helpers for walking register uses
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089 >
2023-07-12 01:34:26 +00:00
Alyssa Rosenzweig
7229bffcb1
nir: Add intrinsics for register access
...
Note the writemask handling is chosen for consistency with the rest of NIR. In
every other instance, writemask=w requires a vec4 source. This is hardcoded into
nir_validate and nir_print as what it means to have a writemask.
More importantly, consistency with how register writemasks currently work.
nir_print hides it, but r0.w = fneg ssa_1.x is actually a vec4 instruction with
source ssa_1.xxxx. As a silly example nir_dest_num_components(that) = 4 in the
old model. I realize this is quite strange coming from a scalar ISA, but it's
perfectly natural for the class of vec4 hardware for which this was designed. In
that hardware, conceptually all instructions are vec4`, so the sequence "fneg
ssa_1 and write to channel w" is implemented as "fneg a vec4 with ssa_1.x in the
last component and write that vec4 out but mask to write only the w channel".
Isn't this inefficient? It can be. To save power, Midgard has scalar ALUs in
addition to vec4 ALUs. Those details are confined to the backend VLIW scheduler;
the instruction selection is still done as vec4. This mechanism has little in
common with AMD's SALUs. Midgard has a wave size of 1, with special hacks for
derivatives.
As a result, all backends consuming register writemasks are expecting this
pattern of code. Changing the store to take a vec1 instead of a vec4 would
require changing every backend to reswizzle the sources to resurrect the vec4. I
started typing a branch to do this yesterday, but it made a mess of both Midgard
and nir-to-tgsi. Without any good reason to think it'd actually help
performance, I abandoned the idea. Getting all 15 backends converted to the
helpers is enough of a challenge without forcing 10 backends to reswizzle their
sources too.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23089 >
2023-07-12 01:34:26 +00:00
Italo Nicola
65d6f5aed2
nir: add options to lower y_vu, yv_yu, yx_xvxu and xy_vxux
...
`y_vu` will be used to convert NV21 to RGB.
`yv_yu` will be used to convert YVYU and VYUY to RGB when the
subsampling formats PIPE_FORMAT_R8B8_R8G8 and PIPE_FORMAT_B8R8_G8R8
are supported.
`yx_xvxu` and `xy_vxux` will be used to convert YVYU and VYUY to RGB
when those subsampling formats are not supported.
Signed-off-by: Italo Nicola <italonicola@collabora.com >
Reviewed-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21219 >
2023-07-10 16:29:13 +00:00
Erik Faye-Lund
67a7b66b90
nir: constify intrin
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24004 >
2023-07-10 16:06:40 +02:00
Timothy Arceri
7cff8d85c0
nir/glsl: add nir_var_declared_implicitly enum
...
This will be used in the following patch.
Reviewed-by: Emma Anholt <emma@anholt.net >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22846 >
2023-07-06 01:21:06 +00:00
Alyssa Rosenzweig
0e7e6f2a0d
nir: Fix breaking in nir_foreach_phi(_safe)
...
When I reading through some of my older commits I noticed that `break` in
`nir_foreach_phi` is broken because I used the two-loop trick wrong. Rewrite the
macros to fix this, and also to generally be a lot cleaner.
Fixes: 7dc297cc14 ("nir: Add nir_foreach_phi(_safe) macro")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23957 >
2023-07-05 08:42:23 -04:00
Marcin Ślusarz
3d7513ee8e
nir: add cheap shortcut for wg id to wg idx lowering
...
... for platforms where integer division is expensive
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334 >
2023-07-04 09:15:08 +00:00
Marcin Ślusarz
7ebfbc97a8
nir: use wg id to wg idx shortcut if two dims of num_workgroups are 1
...
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334 >
2023-07-04 09:15:07 +00:00