bb4f05005e
intel/brw: Print blocks in brw_print_instructions_to_file()
...
Useful when examining the control flow graph. For some reason,
we printed this for the final assembly but not the IR.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30530 >
2024-08-22 22:54:45 +00:00
2d73e42333
intel/brw: Fix OOB reads when printing instructions post-reg-alloc
...
Post-register allocation, but before brw_fs_lower_vgrfs_to_fixed_grfs,
we have registers with the VGRF file but they are actually fixed GRFs.
brw_print_instructions_to_file() was seeing VGRFs and trying to access
their size, but using bogus register numbers that could be out-of-bound.
Detect when we're post-RA and avoid doing this.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30530 >
2024-08-22 22:54:45 +00:00
9f5af68995
mesa/main: expose EXT_multi_draw_indirect
...
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583 >
2024-08-22 21:13:22 +00:00
582eb2439c
panfrost: advertise PIPE_CAP_MULTI_DRAW_INDIRECT
...
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583 >
2024-08-22 21:13:22 +00:00
f390835074
panfrost: use special DrawID register on CSF-based GPUs
...
It allows easier support for multi indirect draws by updating the
draw ID value in each iteration of the loop.
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583 >
2024-08-22 21:13:22 +00:00
ce76caf3ee
pan/bi: implement nir_intrinsic_load_draw_id
...
Only valid on >= 9
Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583 >
2024-08-22 21:13:22 +00:00
676afca468
panfrost: implement multi draw indirect for CSF-based GPUs
...
Add a CSF loop to allow for multiple indirect draws in one call.
Same limitation applies than for single indirect draw, the call
will get emulated if transform feedback or a query is enabled.
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583 >
2024-08-22 21:13:22 +00:00
7c1fe4bdbe
pan/cs: add helpers to generate csf loop
...
Add support for loops where we continually check whether a
condition is met. Also add a `cs_while` pseudo-instruction to more
easily use that feature.
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583 >
2024-08-22 21:13:22 +00:00
50d2396b7e
pan/cs: add helpers to emit contiguous csf code blocks
...
Add support for block, a monolithic sequence of instruction that
must live in a virtually contiguous portion of code, and label, a
reference to a specific position in a block.
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583 >
2024-08-22 21:13:21 +00:00
8b8de5ad9d
panfrost: implement indirect draw for CSF-based GPUs
...
Implement indirect draw by reading the indirect buffer info in CSF
and triggering the IDVS operation just like for a normal direct
draw. If transform feedback or a query is enabled, we still emulate
the indirect draw on the CPU to properly update the XFB buffer
offset and primitives statistics.
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583 >
2024-08-22 21:13:21 +00:00
3b871856d1
panfrost: refactor draw logic to support native draw indirect
...
Split the draw logic into multiple methods depending on whether
the draw is single direct, multiple direct or indirect. Indirect
draws are emulated for now by reading back the indirect buffer info,
but we can implement optimized version later for JM and CSF.
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583 >
2024-08-22 21:13:21 +00:00
d8b6a59896
panfrost: rename PAN_GPU_INDIRECTS
...
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583 >
2024-08-22 21:13:21 +00:00
d9406658ed
brw: remove unused prog_data field
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713 >
2024-08-22 19:44:40 +00:00
cf986dd589
nir: remove unused intel intrinsics
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713 >
2024-08-22 19:44:40 +00:00
3769b58272
anv: move lowering of descriptor intrinsics to apply_layout
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713 >
2024-08-22 19:44:40 +00:00
45117c0ed5
anv: simplify loading driver internal constants
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713 >
2024-08-22 19:44:39 +00:00
7a55a930f6
anv: reuse common pipeline state for compute push allocations
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713 >
2024-08-22 19:44:39 +00:00
afb7b17fdd
freedreno: Enable A505
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23630 >
2024-08-22 19:11:52 +00:00
70cdff1f23
perfetto: Add Panfrost data sources to system.cfg
...
Just like for msm and i915, so it works out-of-the-box.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28363 >
2024-08-22 18:33:45 +00:00
5a38361ba9
nvk/ci: document CTS bug
...
Thanks to @marysaka for identifying and reporting the bug:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/11736#note_2532965
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30793 >
2024-08-22 18:20:55 +00:00
812c8f6abe
tu: Treat partially-bound depth/stencil attachments as passthrough
...
Make sure to preserve the depth or stencil components of D24S8 using the
fixed codepath just added. While we're here, fix the detection of
whether an attachment is bound.
Fixes: cb0f414bhttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26154 >
2024-08-22 17:43:58 +00:00
5377219ca0
tu: Fix passthrough D24S8 attachments
...
We need to make sure that we don't trash a passthrough depth/stencil
aspect if we need to store the whole attachment by loading it
beforehand.
Fixes: cb0f414bhttps://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26154 >
2024-08-22 17:43:58 +00:00
d7f7aede15
intel/ci: don't trigger anv-jsl-full & anv-tgl-full on GL changes
...
These are pure VK-CTS jobs, they don't run any GL tests.
It doesn't matter right now because these two jobs are disabled, but
when they get re-enabled, we'll want this to have been fixed.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30677 >
2024-08-22 16:24:24 +00:00
4e56472da2
ci/panfrost: Move manual/nightly jobs to postmerge stage
...
Create a new stage called arm-postmerge and move the full and manual
jobs over there, to avoid entanglement with the pre-merge jobs.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784 >
2024-08-22 15:35:18 +00:00
ca8f6b66a8
ci/etnaviv: Move manual/nightly jobs to postmerge stage
...
Create a new stage called etnaviv-postmerge and move the full and manual
jobs over there, to avoid entanglement with the pre-merge jobs.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784 >
2024-08-22 15:35:18 +00:00
b70ad23bb1
ci/nouveau: Move manual/nightly jobs to postmerge stage
...
Create a new stage called nouveau-postmerge and move the full and manual
jobs over there, to avoid entanglement with the pre-merge jobs.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784 >
2024-08-22 15:35:18 +00:00
337e00aa2d
ci/llvmpipe: Move manual/nightly jobs to postmerge stage
...
Create a new stage called software-backends-postmerge and move the full
and manual jobs for both llvmpipe and lavapipe over there, to avoid
entanglement with the pre-merge jobs.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784 >
2024-08-22 15:35:18 +00:00
4752ce7186
ci/zink: Move manual/nightly jobs to postmerge stage
...
Create a new stage called layered-backends-postmerge and move the full
and manual jobs over there, to avoid entanglement with the pre-merge
jobs.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784 >
2024-08-22 15:35:18 +00:00
25c70888a5
ci/broadcom: Move manual/nightly jobs to postmerge stage
...
Create new stages called broadcom-postmerge and freedreno-postmerge, and
move the full and manual jobs over there, to avoid entanglement with the
pre-merge jobs.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784 >
2024-08-22 15:35:18 +00:00
cc507536db
ci/intel: Move manual/nightly jobs to postmerge stage
...
Create a new stage called intel-postmerge and move the full and manual
jobs over there, to avoid entanglement with the pre-merge jobs.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784 >
2024-08-22 15:35:18 +00:00
4bcd57b0b5
ci/amd: Move manual/nightly jobs to postmerge stage
...
Create a new stage called amd-postmerge and move the full and manual
jobs over there, to avoid entanglement with the pre-merge jobs.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784 >
2024-08-22 15:35:18 +00:00
f1aab081b5
ci: Create new 'performance' stage
...
Move all jobs doing performance testing to a separate stage.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784 >
2024-08-22 15:35:18 +00:00
97d049504c
ir3: use physical cfg in helper_sched
...
We used the logical cfg in helper_sched under the assumption that (eq)
only kills active helpers. This could lead to something like this:
br p0.x, else
sam
(eq)nop
jump end
else:
sam
end:
It turns out this is not correct: (eq) kills *all* helpers so the
snippet above could produce wrong results.
To fix this, simply switch from using the logical cfg in helper_sched to
using the physical cfg.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409 >
2024-08-22 14:58:14 +00:00
1bbc36c5d2
ir3: recalculate reconvergence after opt_jump
...
opt_jump destroys the physical cfg but it turns out we need it
afterwards in helper_sched. Keeping it correctly up-to-date during
opt_jump turned out to be tricky and complex. Simply recalculate it
afterwards to keep things simple.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409 >
2024-08-22 14:58:14 +00:00
c67381538d
ir3: fix reconvergence of blocks with multiple divergent predecessors
...
When calling ir3_calc_reconvergence after opt_jump, it may happen that
there are multiple divergent branches to the same block. This was
handled incorrectly since first_divergent_pred was unconditionally
overwritten for successors of divergent branches. This patch fixes this
by only making sure only the earliest divergent predecessor is used.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409 >
2024-08-22 14:58:14 +00:00
d9977a6176
ir3: fix adding physical edges multiple times
...
After opt_jump, we might end up with weird control flow likes this:
block0: br block2
[more blocks]
block1: br block3
block2: ...
block3: ...
Since block2 is a logical successor of block1 (due to the fall through),
a physical edge will be added. However, another one will be added
because the branch to block3 crosses block2 (which is a reconvergence
point due to the branch from block0). This currently results in an
assert. This commit fixes this by ignoring successors of the start block
of edges that cross reconvergence points.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409 >
2024-08-22 14:58:14 +00:00
f432eb691e
ir3: Move reconvergence backedge handling
...
Instead of handling backedges after a physical edge is added that extends
the divergence range, handle it at the beginning of the loop. This
handles the TODO by making sure that we also check for backedges after a
block is added to the worklist at the beginning due to a divergent
branch. For example, this fixes cases where opt_jump optimizes
"if (foo) { break; }" to remove the break block and we have a divergent
branch across the loop backedge.
While we're here, also fix an off-by-one that meant we wouldn't handle
backedges that jumped to the immediate previous block (which is again
possible after opt_jump) or the same block.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409 >
2024-08-22 14:58:14 +00:00
aee097ed21
ir3: fix reconvergence points for blocks with two terminators
...
Blocks with two terminators have branches to both successors (instead of
a fall through to one) and hence need to mark both successors as
reconvergence points.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409 >
2024-08-22 14:58:14 +00:00
fba921bf49
ir3: preserve block divergence info in ir3_lower_subgroups
...
We will need this to recalculate reconvergence after opt_jump.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409 >
2024-08-22 14:58:14 +00:00
053612b7cf
ir3: remove unnecessary reconvergence point in scan_clusters lowering
...
The body of the while loop does not need a reconvergence point since it
only has an incoming backwards branch.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409 >
2024-08-22 14:58:13 +00:00
a13394ad91
ir3: print block divergence info
...
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409 >
2024-08-22 14:58:13 +00:00
ec19a354dc
ir3: print predicate inversion for branches
...
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409 >
2024-08-22 14:58:13 +00:00
13066905d3
egl/android: call dri2_display_create() like every other driver
...
Acked-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Eric Engestrom <eric@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30773 >
2024-08-22 14:22:41 +00:00
7b92e11e16
aco: forget valu delays after certain s_waitcnt_depctr/LDSDIR
...
fossil-db (navi31):
Totals from 55242 (69.58% of 79395) affected shaders:
Instrs: 40507666 -> 40138006 (-0.91%); split: -0.91%, +0.00%
CodeSize: 212516104 -> 211025880 (-0.70%); split: -0.70%, +0.00%
Latency: 281643258 -> 281628053 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 46370668 -> 46369637 (-0.00%); split: -0.00%, +0.00%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23337 >
2024-08-22 13:57:01 +00:00
30396ba604
aco: move insert_delay_alu to after insert_NOPs
...
s_delay_alu doesn't affect any hazards, but hazard workarounds don't
update s_delay_alu and so can make the s_delay_alu affect the wrong
instructions.
fossil-db (navi31):
Totals from 55777 (70.25% of 79395) affected shaders:
Instrs: 40740011 -> 40765017 (+0.06%)
CodeSize: 213768484 -> 213870856 (+0.05%); split: -0.00%, +0.05%
Latency: 283713083 -> 283714959 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 46551791 -> 46551835 (+0.00%); split: -0.00%, +0.00%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23337 >
2024-08-22 13:57:01 +00:00
807651561e
aco: split insert_wait_states into two
...
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23337 >
2024-08-22 13:57:00 +00:00
1ebff2220d
frontends/va: Fix leaks with multiple coded buffer segments
...
The buffers can be reused, so we must only allocate added segments
and free unused segments.
Fixes: be4287c3aasivileri@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30779 >
2024-08-22 12:20:22 +00:00
70934f3015
freedreno, tu, ir3: Enable tiled workgroup item dispatch on a7xx
...
There is a 1.6% improvement in the Sacha Willems computeshader demo.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30758 >
2024-08-22 11:55:57 +00:00
58ed1854c4
freedreno/a7xx: Document compute dispatch tiling registers
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30758 >
2024-08-22 11:55:57 +00:00
c56683a3e2
freedreno/computerator: Fix enabling wave128
...
When adding API size controls we didn't update the assembler path. Make
it behave like it did before.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30758 >
2024-08-22 11:55:57 +00:00
Kenneth Graunke