AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
188,964 Commits 1 Branch 0 Tags
b9a0c8dc6d9d780c5e261a4e47cf6a6290801d35
Commit Graph

9341 Commits

Author SHA1 Message Date
Alyssa Rosenzweig b9a0c8dc6d nir/lower_subgroups: add generic scan/reduce lower 
this is the lowering from NAK, fixed up for common code. the existing code is
used for boolean scan/reduce. I make no guarantee that this works for subgroup
sizes other than 32.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28993>
 2024-05-10 17:00:54 +00:00
Alyssa Rosenzweig 8b070c36ec nir/lower_subgroups: add filter 
this will be useful for AGX, which has many reductions (but not all) in
hardware with the logic too backend-specific to encode with bitflags.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28993>
 2024-05-10 17:00:54 +00:00
Timothy Arceri c44e76676b glsl: use hash table when serializing resource data 
This helps us avoid a potential huge number of string compares.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11128

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29116>
 2024-05-10 00:47:17 +00:00
Ian Romanick f6e038fd0f spirv: Use fp16 fp_fast_math settings when lowering fp16 asin and acos 
v2: Save and restore fp_fast_math. Suggested by Georg and Ivan.

v3: Add a message to the static_assert.

Fixes: 750bd9757e ("spirv: gather some float controls bits per instruction")
Reviewed-by: Ivan Briano <ivan.briano@intel.com> [v2]
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> [v2]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29091>
 2024-05-10 00:05:34 +00:00
Saroj Kumar 221371e903 mesa: replace shader_info::source_sha1 
Replace shader_info::source_sha1 with shader_info::source_blake3 in compiler, mesa and radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28156>
 2024-05-09 20:08:18 +00:00
Rhys Perry 9d2711fcb8 nir/dead_cf: stop reindexing blocks for each non-block cf node 
This is faster, especially for large shaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29085>
 2024-05-09 09:57:10 +00:00
Faith Ekstrand 69b0ee7b6c spirv: Get rid of the old caps struct 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:23 +00:00
Faith Ekstrand 22171d16f8 mesa: Use the new spirv_capabilities struct 
Also, re-organize a bit to match the spec better.  There are now
capabilities which need to be set to constant true which we didn't have
to se in the old caps struct and this makes it all more obvious.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand d5f3233a06 spirv: Use spirv_capabilities in tests 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand 3d7a465ad4 spirv: Add support for specifying caps through the new struct 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand a7f8555b96 spirv: Check capabilities using the supported_capabilities table 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand 5836e2430c spirv: Add a table of all implemented capabilities 
This is everything that the SPIR-V parser knows how to handle, not what
the driver supports.

Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand c1eaa03904 spirv: Drop the SubgroupUniformControlFlow check 
It's just a vtn_fail_if() and there's no actual cap for it.  It's not
really gaining us much to have the check.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand 9ae61a152d spirv: Use supported_capabilities for various checks 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand 29aa6cefcc spirv: Add supported_capabilities to vtn_builder 
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand 4b3561b14d spirv: Move the printf enable out of capabilities 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand eed3b56402 spirv: Move the old AMD extensions out of capabilities 
These aren't real capabilities.  They control whether or not we turn on
the extended instruction sets for these instruction types.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand 1d574dcf19 spirv: Record capabilities rather than ad-hoc bools 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand c07cf9c395 spirv: Generate a spirv_capabilities struct 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand 74b17b8d25 spirv: Better handle duplicated enums in the JSON parser 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand 182877342f spirv: Update the JSON and headers 
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Faith Ekstrand a09c5d55ed spirv: Auto-generate spirv_info.h 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
 2024-05-09 01:14:22 +00:00
Timothy Arceri 3d20245f43 glsl: wrap nir_opt_loop in NIR_PASS() 
Otherwise we miss the debugging benefits.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29079>
 2024-05-07 04:11:36 +00:00
Karol Herbst 569c2fcf95 nir: fix nir_shader_get_function_for_name for functions without names. 
It's legal in SPIRV for functions to not have names, we have to take this
into account when calling into strcmp here.

Fixes: 2aa9eb497d ("nir: Add a helper for finding a function by name")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29063>
 2024-05-06 16:45:51 +00:00
Christian Gmeiner db7bfe85ae clc: Always use spir for 32 bit 
Fixes unknown target triple
'unknown-unknown-unknown-spirv-unknown-unknown' problem with llvm 17 on
a 32 bit system.

Fixes: 22fa315ee0 ("clc: use spirv triple starting with llvm-17")

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29049>
 2024-05-05 23:26:14 +00:00
Georg Lehmann 603982ea80 nir/opt_16bit_tex_image: optimize packed conversions too 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28730>
 2024-05-04 15:01:45 +00:00
Georg Lehmann eeed928111 nir/opt_16bit_tex_image: pass options to opt_16bit_dest 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28730>
 2024-05-04 15:01:45 +00:00
Ian Romanick 1b8cf06fc7 nir/algebraic: Optimize some extract_* expressions 
v2: Add missing '!options->lower_extract_byte' to the last two
patterns. Every driver except Asahi sets both or neither.

shader-db:

All Intel platforms had similar results. (DG2 shown)
total instructions in shared programs: 19659360 -> 19659356 (<.01%)
instructions in affected programs: 44 -> 40 (-9.09%)
helped: 2 / HURT: 0

total cycles in shared programs: 823432524 -> 823432520 (<.01%)
cycles in affected programs: 1722 -> 1718 (-0.23%)
helped: 2 / HURT: 0

fossil-db:

All Intel platforms had similar results. (DG2 shown)
Totals:
Instrs: 153989787 -> 153989617 (-0.00%)
Cycle count: 17562079230 -> 17562079493 (+0.00%); split: -0.00%, +0.00%

Totals from 24 (0.00% of 631369) affected shaders:
Instrs: 13733 -> 13563 (-1.24%)
Cycle count: 341392 -> 341655 (+0.08%); split: -0.25%, +0.33%

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> [v1]
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27891>
 2024-05-03 15:01:43 -07:00
Daniel Schürmann 6b4b044739 nir/opt_loop: add loop peeling optimization 
This optimization turns:

     loop {
        do_work_1();
        if (cond) {
           break;
        } else {
        }
        do_work_2();
     }

 into:

     do_work_1();
     if (cond) {
     } else {
        loop {
           do_work_2();
           do_work_1();
           if (cond) {
              break;
           } else {
           }
        }
     }

RADV GFX11:
Totals from 925 (1.17% of 79395) affected shaders:
MaxWaves: 20583 -> 20455 (-0.62%)
Instrs: 5260489 -> 5361418 (+1.92%); split: -0.63%, +2.55%
CodeSize: 26965388 -> 27501104 (+1.99%); split: -0.48%, +2.47%
VGPRs: 70304 -> 70712 (+0.58%)
SpillSGPRs: 2163 -> 2159 (-0.18%)
Scratch: 51200 -> 69632 (+36.00%)
Latency: 36404844 -> 34542213 (-5.12%); split: -5.51%, +0.39%
InvThroughput: 6628474 -> 6384249 (-3.68%); split: -4.19%, +0.50%
VClause: 124997 -> 127008 (+1.61%); split: -0.43%, +2.04%
SClause: 121774 -> 120799 (-0.80%); split: -3.21%, +2.40%
Copies: 357048 -> 360850 (+1.06%); split: -0.62%, +1.68%
Branches: 171985 -> 168082 (-2.27%); split: -3.61%, +1.34%
PreSGPRs: 59812 -> 60088 (+0.46%); split: -0.20%, +0.66%
PreVGPRs: 60325 -> 60586 (+0.43%); split: -0.29%, +0.72%
VALU: 2882263 -> 2951373 (+2.40%); split: -0.37%, +2.77%
SALU: 636373 -> 640091 (+0.58%); split: -0.87%, +1.46%
VMEM: 200059 -> 204612 (+2.28%); split: -0.09%, +2.36%
SMEM: 173328 -> 174343 (+0.59%); split: -2.34%, +2.92%
VOPD: 1064 -> 898 (-15.60%); split: +0.09%, -15.70%

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150>
 2024-05-03 13:01:29 +00:00
Daniel Schürmann 3a2226be47 nir/opt_if: don't split ALU of phi into otherwise empty blocks 
RADV GFX11:
Totals from 1566 (1.97% of 79395) affected shaders:
Instrs: 5663011 -> 5638219 (-0.44%); split: -0.45%, +0.01%
CodeSize: 29760844 -> 29639756 (-0.41%); split: -0.42%, +0.01%
SpillSGPRs: 1750 -> 1603 (-8.40%)
Latency: 62963520 -> 62831280 (-0.21%); split: -0.22%, +0.01%
InvThroughput: 10501171 -> 10490116 (-0.11%); split: -0.11%, +0.00%
VClause: 127928 -> 128054 (+0.10%); split: -0.01%, +0.11%
SClause: 152635 -> 152956 (+0.21%); split: -0.08%, +0.29%
Copies: 476865 -> 461288 (-3.27%); split: -3.28%, +0.02%
Branches: 169038 -> 168104 (-0.55%); split: -0.56%, +0.00%
PreSGPRs: 88851 -> 88356 (-0.56%); split: -0.58%, +0.02%
PreVGPRs: 114565 -> 114559 (-0.01%); split: -0.01%, +0.01%
VALU: 3158023 -> 3157387 (-0.02%); split: -0.03%, +0.01%
SALU: 615028 -> 595360 (-3.20%); split: -3.21%, +0.01%
VMEM: 219891 -> 218287 (-0.73%); split: -0.74%, +0.01%
SMEM: 206956 -> 206484 (-0.23%)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150>
 2024-05-03 13:01:29 +00:00
Daniel Schürmann e74f5b16e3 nir/loop_analyze: adjust negative (or huge) iteration count check for bit size 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150>
 2024-05-03 13:01:29 +00:00
Jesse Natalie 894f7f4387 nir_opt_algebraic: Add a couple optimizations for lowered unpack(pack()) 
I noticed some unnecessary 64-bit ints in shaders that were using doubles.
Perhaps there's a different missing optimization that should run on the
actual pack/unpack instructions before they're lowered, or maybe I'm just
lowering them too early, but these seem simple enough that we might want
them even for hand-rolled pack/unpack pairs.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27314>
 2024-05-01 21:55:20 +00:00
Marek Olšák d802aca523 nir/lower_image: support FMASK loads with a 16-bit sample index 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
 2024-05-01 19:41:35 +00:00
Marek Olšák a01712874d nir/lower_tex: support FMASK loads with a 16-bit sample index 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
 2024-05-01 19:41:35 +00:00
Marek Olšák 8f1ae6c7b1 nir: add shader_info::use_aco_amd 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
 2024-05-01 19:41:35 +00:00
Marek Olšák fcb627945b nir: add more build helpers 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
 2024-05-01 19:41:35 +00:00
Marek Olšák 1632948a76 nir: validate src_type of store_output intrinsics, require bit_size >= 16 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
 2024-05-01 19:41:35 +00:00
Marek Olšák f9d78f110c nir: add sleep intrinsics for AMD 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-By: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889>
 2024-04-30 17:17:25 +00:00
Marek Olšák b06a71b3cd nir: add streamout intrinsics for AMD GFX12 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-By: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889>
 2024-04-30 17:17:25 +00:00
Marek Olšák 1a791c1303 nir: add nir_atomic_op_ordered_add_gfx12_amd 
for streamout

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-By: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889>
 2024-04-30 17:17:25 +00:00
Marek Olšák d4cfcbdde8 nir: add ACCESS_CP_GE_COHERENT_AMD 
required by amd gfx12

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-By: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889>
 2024-04-30 17:17:25 +00:00
Konstantin Seurer ea863c0c1c nir/print: Do not access invalid indices of load_uniform 
load_uniform does not have io_semantics and component.

Fixes: a83fd26 ("nir/print: stop trying to match i/o vars using base/driver_location")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28962>
 2024-04-28 16:06:46 +02:00
Georg Lehmann 6ab4b2d7a0 spirv: preserve signed zero in modf 
fsign's result can be +0.0 or -0.0 for -0.0. We already calculate
the signed zero, it's even faster to replace the fmul(fsign(x), ...) with ior.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28938>
 2024-04-26 21:31:53 +00:00
Connor Abbott 32308fe9f1 ir3/nir: Fix imadsh_mix16 definition 
The constant-folding definition and comments say that it takes the high
16 bits of the first source and low 16 bits of the second source, but
actually it's the opposite. The algebraic optimization, which actually
happens and needs to be correct, was correct but the comment above it
was wrong.

Note that in the way we use it when lowering multiplications, the
ordering doesn't matter.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075>
 2024-04-26 12:55:14 +00:00
Eric Engestrom 71fd7836f6 spirv: deduplicate default debug log level 
`level` is already set to WARNING by default, so return it normally
instead of hard-coding WARNING again in the other code path.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28799>
 2024-04-26 10:38:12 +00:00
Christian Gmeiner 33db56e784 isaspec: Improve 'meta' handling 
As a meta line could become quite long, make it possible to have
multiple meta tags.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28920>
 2024-04-26 03:35:13 +00:00
Christian Gmeiner 1747fed633 isaspec: Add method to get the displayname of BitSetEnumValue 
This is needed for an assembler use case.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28920>
 2024-04-26 03:35:12 +00:00
Iván Briano 22fa29ac2f vtn: support float controls2 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281>
 2024-04-25 12:13:41 +00:00
Iván Briano 7f97fa6df0 nir/algebraic: move float control conditions to be per instruction 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281>
 2024-04-25 12:13:41 +00:00
Iván Briano 8c4cd3e74e nir/algebraic: support float controls conditions per instruction 
v?:
 - Make the Python not awful (Dylan)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281>
 2024-04-25 12:13:41 +00:00