Commit Graph

117072 Commits

Author SHA1 Message Date
Eric Anholt 8265dfaa87 nir: Allow using nir_lower_io_to_scalar_early on VS input vars.
This will be used on V3D to cut down the size of the VS inputs in the VPM
(memory area for sharing data between shader stages).

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-10-30 10:46:52 -07:00
Jason Ekstrand f48b742289 anv: Bump the advertised patch version to 90
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-10-30 11:43:43 -05:00
Emil Velikov 29283921b7 m4: add Werror when checking for compiler flags
Seemingly that at some point clang started accepting _any_ flags,
whereas previously it would error out.

These days, you can give it -Whamsandwich and it will succeed, while
at the same time throwing an annoying warning.

Add -Werror so that everything gets flagged and set accordingly.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108082
Cc: Vinson Lee <vlee@freedesktop.org>
Repored-by: Vinson Lee <vlee@freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-10-30 16:41:05 +00:00
Dylan Baker a8bed38b54 docs/calendar: Add 18.3 plan and expand 18.2
Emil will be helping out with 18.3, while Juan finalises 18.2

v2: [Emil] add Emil for 18.3, fix typos

CC: Emil Velikov <emil.velikov@collabora.com>
CC: Juan A. Romero Suarez <jasuarez@igalia.com>
Cc: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
2018-10-30 16:35:58 +00:00
Emil Velikov c210d0c3b7 vulkan/wsi: use the drmGetDevice2() API
On older kernels, the drmGetDevice() call will wake up all the GPUs
on the system, while fetching the PCI revision.

Use the 2 version of the API and pass flags == 0, so we don't fetch the
device PCI revision, since we don't need that information.

Fixes: baa38c144f ("vulkan/wsi: Use VK_EXT_pci_bus_info for DRM fd matching")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2018-10-30 16:35:50 +00:00
Jason Ekstrand a45b6fb452 spirv: Pass SSA values through functions
Previously, we would create temporary variables and fill them out.
Instead, we create as many function parameters as we need and pass them
through as SSA defs.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2018-10-30 11:22:44 -05:00
Mauro Rossi bfe0e32913 android: i965/tiled_memcpy: fix build for x86 generic target
x86 32 bit generic target does not enable ARCH_X86_HAVE_SSE4_1
for this reason all Android library modules using SSE4_1 in mesa
are built conditionally to ARCH_X86_HAVE_SSE4_1

The same approach is now applied to libmesa_intel_tiled_memcpy_sse41
in order to avoid the following building errors:

external/mesa/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c:574:15:
error: initializing '__m128i' (vector of 2 'long long' values) with an expression of incompatible type 'int'
      __m128i val = _mm_stream_load_si128((__m128i *)src);
              ^     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
external/mesa/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c:578:15:
error: initializing '__m128i' (vector of 2 'long long' values) with an expression of incompatible type 'int'
      __m128i val0 = _mm_stream_load_si128(((__m128i *)src) + 0);
              ^      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
external/mesa/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c:579:15:
error: initializing '__m128i' (vector of 2 'long long' values) with an expression of incompatible type 'int'
      __m128i val1 = _mm_stream_load_si128(((__m128i *)src) + 1);
              ^      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
external/mesa/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c:580:15:
error: initializing '__m128i' (vector of 2 'long long' values) with an expression of incompatible type 'int'
      __m128i val2 = _mm_stream_load_si128(((__m128i *)src) + 2);
              ^      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
external/mesa/src/mesa/drivers/dri/i965/intel_tiled_memcpy.c:581:15: error: initializing '__m128i' (vector of 2 'long long' values) with an expression of incompatible type 'int'
      __m128i val3 = _mm_stream_load_si128(((__m128i *)src) + 3);
              ^      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5 errors generated.

Fixes: 11b1afdc92 ("i965/tiled_memcpy: inline movntdqa loads in tiled_to_linear")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2018-10-30 14:45:16 +02:00
Toni Lönnberg 50e952840f intel: tools: Add handling for video pipe
Preliminary work for adding handling of different pipes to gen_decoder. We
need to be able to distinguish between different pipes in order to decode
the packets correctly due to opcode re-use.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-10-30 12:43:00 +00:00
Toni Lönnberg d5a938c58d intel/decoder: Use 'DWord Length' and 'bias' fields for packet length.
Use the 'DWord Length' and 'bias' fields from the instruction definition to
parse the packet length from the command stream when possible. The hardcoded
mechanism is used whenever an instruction doesn't have this field.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-10-30 12:43:00 +00:00
Marek Olšák a09cbaffbf mesa: expose EXT_texture_compression_s3tc on GLES
The spec was modified to support GLES.

Tested-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2018-10-30 13:31:00 +01:00
Michał Janiszewski 2734baa9e2 mesa: Add missing include guards
Signed-off-by: Michał Janiszewski <janisozaur+signed@gmail.com>

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-10-30 06:19:10 -06:00
Michał Janiszewski ec994ca0fc glx: Add missing include guards
Signed-off-by: Michał Janiszewski <janisozaur+signed@gmail.com>

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-10-30 06:19:10 -06:00
Michał Janiszewski 8ebd7039c4 svga: Add missing include guards
Signed-off-by: Michał Janiszewski <janisozaur+signed@gmail.com>

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-10-30 06:19:09 -06:00
Michał Janiszewski 0654450911 glsl: Add missing include guards
Signed-off-by: Michał Janiszewski <janisozaur+signed@gmail.com>

Reviewed-by: Brian Paul <brianp@vmware.com>
2018-10-30 06:19:09 -06:00
Eric Engestrom fddf384d1d intel/batch-decoder: remove never-used function
This function was there when the file was introduced in commit
38f10d5a03 "intel: tools: add aubinator viewer", but was
never actually used.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-10-30 10:59:43 +00:00
Eric Engestrom e9fb81375a st/dri: remove leftover local variable
Left over from the cleanup in 6ccc435e7a "pipe-loader: move dup(fd)
within pipe_loader_drm_probe_fd"

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-30 10:20:58 +00:00
Vadym Shovkoplias 7d66eddbbd glsl/linker: Fix out variables linking during single stage
Since out variables are copied from shader objects instruction
streams to linked shader instruction steam it should be cloned
at first to keep source instruction steam unaltered.

Fixes: 966a797e43 ("glsl/linker: Link all out vars from a shader
objects on a single stage")

Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105731
2018-10-30 10:19:17 +11:00
Marek Olšák 8676af12c8 ac: fix ac_build_fdiv for f64
trivial

Fixes: a5f35aa742
2018-10-29 17:24:21 -04:00
Brian Paul 9007c0ed26 nir: fix yet another MSVC build break
Trivial.
2018-10-29 11:15:12 -06:00
Eric Engestrom f3a5757eba vulkan/wsi: simplify meson file tracking
Meson already automatically tracks included headers, so there's no need
to add them everywhere; cleans up the code a bit.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-10-29 16:39:47 +00:00
Eric Engestrom 1df0c1e8fb clover: add missing meson build dependency
Fixes: 42ea0631f1 "meson: build clover"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-10-29 16:39:42 +00:00
Eric Engestrom 98e7c3e7a7 svga: add missing meson build dependency
Fixes: a537231b22 "meson: build svga driver on linux"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-10-29 16:39:38 +00:00
Eric Engestrom 912cd0ce3b radv: add missing meson build dependency
Fixes: 9d40ec2cf6 "radv: Add support for VK_KHR_driver_properties."
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-10-29 16:39:34 +00:00
Eric Engestrom 2be1f9ceba anv: add missing meson build dependency
Fixes: e4538b93f5 "anv: Implement VK_KHR_driver_properties"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-10-29 16:39:07 +00:00
Samuel Pitoiset b4eb029062 radv: implement VK_EXT_transform_feedback
This implementation should work and potential bugs can be
fixed during the release candidates window anyway.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 17:10:58 +01:00
Samuel Pitoiset f8d0337299 radv: add multiple streams support for the GS copy shader
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 17:09:08 +01:00
Samuel Pitoiset 6c21645046 radv: emit stream outputs for vertex and tessellation stages
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 17:09:08 +01:00
Samuel Pitoiset 19f1b49236 radv: declare streamout SGPRs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 17:09:08 +01:00
Samuel Pitoiset f4fa8de794 radv: gather stream output info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 17:09:08 +01:00
Samuel Pitoiset fe551ec122 radv: allow to emit a vertex to a specified stream
This is required for GS multiple streams support.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 17:09:08 +01:00
Samuel Pitoiset a59f1b06ef radv: allow to use up to 4 GSVS ring buffers
For all streams. We basically just need to update the
base address and compute a stride for every stream.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 17:09:08 +01:00
Samuel Pitoiset 98c09c3fcd radv: adjust the number of output components per stream
Same as the previous patch, except that is only the number of
components.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 17:09:08 +01:00
Samuel Pitoiset 4649471a9e radv: adjust the GSVS ring sizes based on the number of components
For multiple streams support we have to set the different ring
buffer sizes correctly. This relies on the number of output
components per stream.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 17:09:08 +01:00
Samuel Pitoiset 8e428e24a8 radv: gather which GS stream is used for every outputs
To only emit outputs for the given stream.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 17:09:08 +01:00
Samuel Pitoiset dd996d1885 radv: gather the number of output components per stream
This will be also used for splitting the GS->VS ring buffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 17:09:08 +01:00
Samuel Pitoiset 87e6866b04 radv: gather the number of streams used by geometry shaders
This will be used for splitting the GS->VS ring buffer. The
stream ID is always 0 for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 17:09:08 +01:00
Jason Ekstrand 19064b8c3a nir: Add a pass for gathering transform feedback info
This is different from the GL_ARB_spirv pass because it generates a much
simpler data structure that isn't tied to OpenGL and mtypes.h.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-10-29 17:09:08 +01:00
Jason Ekstrand e8a5fa054d vulkan: Update the XML and headers to 1.1.90
This doesn't include any new features but it does include an XML and
header typo fix for modifiers.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-10-29 10:17:19 -05:00
Samuel Pitoiset 9e56ffb0b4 radv: remove wrong comment in calculate_gs_ring_sizes() about streams
The computation seems correct compared to RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-10-29 12:33:58 +01:00
Rob Clark a61952e737 freedreno: don't flush when new and old pfb is identical
In the 'inorder' case (ie. FD_MESA_DEBUG=inorder, or old kernel), if the
u_blitter clear path is used (a3xx, a4xx, and some fallback cases on
newer gens), util_blitter_restore_fb_state() will set_framebuffer_state()
to something that is identical to the current fb state, which triggers
an unnecessary flush, and then eventually an assert:

  (gdb) bt
  #0  0x0000007fbf24a078 in kill () from /lib64/libc.so.6
  #1  0x0000007fbe061278 in _debug_assert_fail (expr=0x7fbe93a820 "!batch->flushed", file=0x7fbe93a628 "../src/gallium/drivers/freedreno/freedreno_batch.c", line=491, function=0x7fbe93a990 <__func__.17380> "fd_batch_check_size") at ../src/gallium/auxiliary/util/u_debug.c:322
  #2  0x0000007fbe1ccb8c in fd_batch_check_size (batch=0x55556d5a70) at ../src/gallium/drivers/freedreno/freedreno_batch.c:491
  #3  0x0000007fbe1d0e08 in fd_clear (pctx=0x55555c61e0, buffers=5, color=0x55556e388c, depth=1, stencil=0) at ../src/gallium/drivers/freedreno/freedreno_draw.c:463
  #4  0x0000007fbe57afa4 in st_Clear (ctx=0x55556e17b0, mask=18) at ../src/mesa/state_tracker/st_cb_clear.c:452

The assert was introduced in 4b847b38ae, so from a functionality
standpoint this patch fixes that commit.  But it should also avoid an
unnecessary flush in the 'inorder' case, fixing a performance bug.

Fixes: 4b847b38ae freedreno: make fd_batch a one-shot thing
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-28 14:03:38 -04:00
Rob Clark 32dd75b927 freedreno: dependency tracking for z/s depends on ZSA state
ZSA state can change whether depth or stencil is enabled

This plus previous patch fix stk, and various things w/
FD_MESA_DEBUG=inorder

Fixes: ec717fc629 freedreno: reduce resource dependency tracking overhead
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-28 14:03:38 -04:00
Rob Clark 05e868925c freedreno: mark all state dirty after switching batch
The problem isn't directly with ec717fc629 but rather that commit
exposes the problem.  When we switch batch we cannot assume previous
state is clean so we should mark all state dirty.

Fixes: ec717fc629 freedreno: reduce resource dependency tracking overhead
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-28 14:03:38 -04:00
Jason Ekstrand 1bd4f8fefc anv: Use absolute timeouts in wait_for_bo_fences
We were previously using relative timeouts and decrementing the
user-provided timeout as we waited.  Instead, this commit refactors
things to use absolute timeouts throughout.  This should fix a subtle
bug in the waitAll case where we aren't decrementing the timeout after a
successful GPU wait.  Since pthread_cond_timedwait already takes an
absolute timeout, it's also significantly simpler.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-10-27 16:18:33 -05:00
Jason Ekstrand cbd4468695 anv: Flag semaphore BOs as external
It probably doesn't actually break anything but it does cause some
assertions in debug builds.

Fixes: 7a89a0d9ed "anv: Use separate MOCS settings for external BOs"
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-10-27 00:02:32 -05:00
Jason Ekstrand 663a113700 anv: Improve the asserts in anv_buffer_get_range
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-10-27 00:02:32 -05:00
Rob Clark c41772d17a freedreno/a6xx: inline draw_impl()
Now that it is just called once per draw (instead of once for binning
and once for draw), let's just inline it.  If nothing else, it makes
perf-annotate easier to look at.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-26 18:10:00 -04:00
Rob Clark 604b5f1dca freedreno/a6xx: small cleanup
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-26 18:10:00 -04:00
Rob Clark 2a74d9ae8d freedreno/a6xx: move where we handle dirty vbo state
Historically this wasn't in fdN_emit_state(), because prior to addition
of blitter in a5xx, fdN_emit_state() was also used in the clear path.
These days that is only true for a2xx (a3xx and a4xx use u_blitter).  So
the reason for it not to be in fd6_emit_state() no longer exists.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-26 18:10:00 -04:00
Rob Clark ddb7fadaf8 freedreno: avoid no-op flushes by re-using last-fence
Noticed that with webgl (in chromium, at least) we end up generating a
lot of no-op submits just to get a fence.  Tracking the last fence and
returning that if there is no rendering since last flush avoids this.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-26 18:10:00 -04:00
Kristian H. Kristensen 01194cd582 freedreno/a6xx: Move stencil/depth/alpha state to IB
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
2018-10-26 18:10:00 -04:00