AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
178,491 Commits 1 Branch 0 Tags
b048ba569a317906c12bd86a40f88fe5e5ae08c8
Commit Graph

165278 Commits

Author SHA1 Message Date
Danylo Piliaiev 34d436fde2 tu/virtio: Fix incorrect call to tu_perfetto_submit 
Virtio backend backend was not updated because it was not
compiled in CI and not compiled locally.

Fixes: 7f59e37233
("tu/perfetto: Allow gpu time to be passed into tu_perfetto_submit")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25531>
 2023-10-03 17:06:26 +00:00
Danylo Piliaiev ec95573302 tu/a7xx: Correctly record timestamps for u_trace 
It was changed how CP_EVENT_WRITE works on A7XX.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25528>
 2023-10-03 15:48:12 +00:00
Rob Clark 583c636ea4 freedreno: Add attach-bo debugging 
Add asserts to verify that BOs referenced in cmdstream are attached to
the submit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25465>
 2023-10-03 15:18:03 +00:00
Rob Clark 366367eba8 freedreno: Move/add some attach_bo() 
In some cases we were missing this, in others we just needed to move it
before the OUT_RELOC().

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25465>
 2023-10-03 15:18:03 +00:00
Rob Clark 9870cca6a0 freedreno: Add missing indirect_draw_count tracking 
Fixes: f677f64e80 ("freedreno: implement GL_ARB_indirect_parameters")
Fixes: b43e5aec0d ("freedreno/batch: Move submit bo tracking to batch")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25465>
 2023-10-03 15:18:03 +00:00
Rob Clark 8a3b4b69a2 freedreno: Add private-BO tracking 
There are some internally used buffers that we should just attach to
every submit up-front.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25465>
 2023-10-03 15:18:03 +00:00
Rob Clark c6f17d89c7 freedreno/batch: Move query_buf allocation 
This lets us move fd_batch_update_queries() after resource tracking.
Which will become needed in the next patch which adds validation to
assert needed BOs are attached to the submit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25465>
 2023-10-03 15:18:03 +00:00
Rob Clark 2189920e49 freedreno: Fix user const buffer dirtiness 
If we went the upload_user_buffer() path, cb->buffer would be null,
causing fd_dirty_shader_resource() to be a no-op.  What we want to
use is &so->cb[index].

Fixes: b43e5aec0d ("freedreno/batch: Move submit bo tracking to batch")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25465>
 2023-10-03 15:18:03 +00:00
Rob Clark 4c0defda8a freedreno: Fix streamout offset_buf dirtiness 
We also need to mark the offset buffer as dirty.

Fixes: b43e5aec0d ("freedreno/batch: Move submit bo tracking to batch")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25465>
 2023-10-03 15:18:03 +00:00
Rob Clark 1f6e20cca6 freedreno/a6xx: Remove dummy packet for globals 
Unneeded since commit b43e5aec0d ("freedreno/batch: Move submit bo
tracking to batch")

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25465>
 2023-10-03 15:18:03 +00:00
Rob Clark 8c537a35e6 freedreno: Use explicit QCOM_TILED3 modifier 
Now that this is in upstream drm_fourcc.h we can drop the private
internal modifier.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25465>
 2023-10-03 15:18:03 +00:00
Rob Clark d0b861200e freedreno: Indentation fix 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25465>
 2023-10-03 15:18:03 +00:00
Danylo Piliaiev ec268fa5b6 tu/kgsl: Support u_trace and perfetto 
Raw GPU time is retrieved via kgsl_cmdbatch_profiling_buffer,
offseted GPU time is retrieved via KGSL_PERFCOUNTER_GROUP_ALWAYSON.
This allows to calculate GPU time offset for each submission and
synchronize CPU/GPU time domains.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12805>
 2023-10-03 14:19:24 +00:00
Danylo Piliaiev 3ccd199708 tu/kgsl: Fix memory leak of tmp allocations during submissions 
cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12805>
 2023-10-03 14:19:24 +00:00
Danylo Piliaiev 7f59e37233 tu/perfetto: Allow gpu time to be passed into tu_perfetto_submit 
In preparation to support perfetto on KGSL, on KGSL GPU time is
retrieved on submission and requires minimal post-processing.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12805>
 2023-10-03 14:19:24 +00:00
Danylo Piliaiev 18a47efb80 tu/perfetto: Remove now unnecessary tu_perfetto_util 
Since Turnip now uses C++ we can directly include tu_device.h
into perfetto code.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12805>
 2023-10-03 14:19:24 +00:00
Georg Lehmann bd16d3cdaf nir/lower_subgroups: use intrinsic builder more 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25501>
 2023-10-03 12:49:28 +00:00
Georg Lehmann 289b369597 nir: make quad intrinsic dst bit size match src0 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25501>
 2023-10-03 12:49:28 +00:00
Christian Gmeiner b2e4972339 isaspec: Add BitSetEnumValue object 
There might be cases where you describe an enum in isaspec and want it to use
for decoding but also for codegen with e.g. mako.

Lets have a look at the following exmaple:

<enum name="#cond">
	<value val="0" display=""/>    <!-- always: display nothing -->
	<value val="1" display=".gt"/>
	...
</enum>

In the decoding case we want that nothing gets displayed if #cond has the value of "0". For
codegen with mako this could result in the following C code:

enum PACKED cond {
   COND_ = 0,
   COND_GT = 1,
   ...
};

What you really want is this:

enum PACKED cond {
   COND_ALWAYS = 0,
   COND_GT = 1,
   ...
};

To make this possible introduce BitSetEnumValue class which represents
an isaspec xml enum. It holds the value, displayname and now a name.

With the  __str__ method the old behaviour is still intact.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25451>
 2023-10-03 12:07:04 +00:00
Christian Gmeiner b67cac5eba isaspec: Add support for custom meta information 
Allows every user of isaspec to add custom meta information
to any bitset. This can be quite handy if you want to know
how many sources your instruction have, if this instruction has
a dest or provide some names for sources that can be used
by some debug tools.

All you need is to sprinkle <meta> tags in the xml file and
provide custom attributes.
  <meta has_dest="1" num_sources="3" .. />

With get_meta() method of any bitset you can get access to
the dict with all the attributes. get_meta() walks the whole
tree to collect all <meta> tags on the way to the root node.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25451>
 2023-10-03 12:07:04 +00:00
Christian Gmeiner eb87ae4286 isaspec: Add method to get all instrustions 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25451>
 2023-10-03 12:07:04 +00:00
Christian Gmeiner ef602e77f6 isaspec: encode: Correct used regex 
The current regex misses the = sign and therefore fails to match
DST:align=16.

Fixes: 9e56f69edf ("isaspec: encode: handle special fieldname properties")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25451>
 2023-10-03 12:07:04 +00:00
Christian Gmeiner 2c9a59dcfc isaspec: Add support for templates 
If you have a repeating <display> substring you can replace this
substring with a template and reference the template name instead.

Saves from doing lot of copy&paste and makes general changes to the
substring much easier.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25451>
 2023-10-03 12:07:04 +00:00
Juan A. Suarez Romero 62a4a05658 v3dv/ci: update expected list 
Remove dEQP-VK.api.driver_properties.conformance_version, as the version
it required is now the one used in the CI.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25518>
 2023-10-03 11:05:00 +00:00
Samuel Pitoiset 2bce101eb3 radv: enable DCC for MSAA images on GFX11 
This seems to be working now! I suspect either the "recent" addrlib
update fixed it or recent comp-to-single fast clear fixes.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8326
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25448>
 2023-10-03 09:35:25 +00:00
Jonathan Marek 90f12ce740 tu: add a TU_DEBUG=rd option for cmdstream dumping 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25246>
 2023-10-02 23:31:35 +00:00
Jonathan Marek d35922ce26 freedreno: move redump.h to common code + cleanup 
remove the unused parts and add an implementation of rd_write_section

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25246>
 2023-10-02 23:31:34 +00:00
Sagar Ghuge 9d7166dfc0 isl: Use 16-bit instead of 8-bits for surface format info fields 
Comparing uint8_t max value 255 with devinfo->verx10 will work fine for
now but for future platforms, comparison will fail. To avoid this
let's switch the field data type from 8-bits to 16-bits.

v1: (Jordan)
- Use 16 bits instead of 32 and add assertion.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25478>
 2023-10-02 17:24:33 +00:00
Samuel Pitoiset 4bc58c9f11 radv/amdgpu: fix alignment of command buffers 
Fixes other recent regressions.

Fixes: 4f660f99 ("ac/gpu_info: pad IBs according to ib_size_alignment")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25502>
 2023-10-02 16:48:28 +00:00
Martin Roukala (né Peres) 98bc20041c ci: make B2C_JOB_VOLUME_EXCLUSIONS to all .b2c-test jobs 
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25429>
 2023-10-02 14:50:27 +00:00
Georg Lehmann 79b767f4c0 aco: remove -0.0 for 32 bit fsign with mul_legacy/omod when denorms are flushed 
v_mul_legacy_f32 and omod return +0.0 if any operand is +0.0/-0.0.

Foz-DB Navi21:
Totals from 4289 (5.60% of 76572) affected shaders:
Instrs: 8100571 -> 8099319 (-0.02%); split: -0.02%, +0.00%
CodeSize: 43433200 -> 43435088 (+0.00%); split: -0.01%, +0.01%
Latency: 88151566 -> 88147232 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 22966705 -> 22965192 (-0.01%); split: -0.01%, +0.00%
VClause: 190010 -> 190009 (-0.00%)
SClause: 269697 -> 269689 (-0.00%)
Copies: 687294 -> 687296 (+0.00%); split: -0.00%, +0.00%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25347>
 2023-10-02 14:02:49 +00:00
Georg Lehmann 9508cadadb aco/optimizer: copy propagate to output modifier instructions 
Foz-DB Navi21:
Totals from 847 (1.11% of 76572) affected shaders:
Instrs: 2331245 -> 2330335 (-0.04%); split: -0.04%, +0.00%
CodeSize: 12451040 -> 12451736 (+0.01%); split: -0.00%, +0.01%
Latency: 26230953 -> 26229153 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 6297802 -> 6296788 (-0.02%); split: -0.02%, +0.00%
VClause: 64527 -> 64528 (+0.00%); split: -0.00%, +0.01%
SClause: 73150 -> 73121 (-0.04%); split: -0.06%, +0.02%
Copies: 180083 -> 179172 (-0.51%); split: -0.53%, +0.02%
PreSGPRs: 62311 -> 62316 (+0.01%)
PreVGPRs: 51720 -> 51710 (-0.02%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25347>
 2023-10-02 14:02:49 +00:00
Georg Lehmann 89f3a5ea37 aco/optimizer: check if we can use omod before labeling it 
Allows to use omod for v_mul_legacy_f32 regardless of signedZeroInfNaNPreserve

Foz-DB Navi21:
Totals from 15 (0.02% of 76572) affected shaders:
Instrs: 20131 -> 20113 (-0.09%)
CodeSize: 107100 -> 107144 (+0.04%)
Latency: 400789 -> 400470 (-0.08%)
InvThroughput: 62342 -> 62278 (-0.10%)
Copies: 1194 -> 1176 (-1.51%)
PreVGPRs: 787 -> 785 (-0.25%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25347>
 2023-10-02 14:02:49 +00:00
Samuel Pitoiset d3033974ee radv/ci: update list of flakes for NAVI10/VEGA10 
This one is fixed since CTS 1.3.6.3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25505>
 2023-10-02 14:44:58 +02:00
Samuel Pitoiset 387dc05a61 radv/ci: update list of expected failures on PITCAIRN 
This one is fixed since CTS 1.3.6.3.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25505>
 2023-10-02 14:44:35 +02:00
Samuel Pitoiset b01e874234 radv: fix alignment of DGC command buffers 
Otherwise, DGC command buffers might not be correctly aligned.

This fixes a regression with the vkd3d-proton DGC tests.

Fixes: 4f660f9937 ("ac/gpu_info: pad IBs according to ib_size_alignment")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25500>
 2023-10-02 12:21:44 +00:00
Tapani Pälli 1c4d57568a intel/genxml: remove HDC from gen11.xml, it is not available 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25399>
 2023-10-02 12:05:54 +00:00
Tapani Pälli a49ff4e024 iris: HDC flush is available only for GFX_VER 12+ 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25399>
 2023-10-02 12:05:54 +00:00
Tapani Pälli 99d3d76646 anv: HDC flush is available only for GFX_VER 12+ 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25399>
 2023-10-02 12:05:53 +00:00
Tapani Pälli c02db0d90f iris: flush data cache when flushing HDC on GFX < 12 
This matches what anv driver does.

Fixes: a969ad1d ("iris: Demote DC flush to HDC flush in cache tracker")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6314
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25399>
 2023-10-02 12:05:53 +00:00
Rhys Perry 558738e3c5 aco: remove zero offset optimization 
This is done in nir_opt_constant_folding now.

No fossil-db changes on navi31.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25477>
 2023-10-02 10:11:37 +00:00
Rhys Perry 7139a78959 nir/constant_folding: remove zero texel offset 
fossil-db (navi31):
Totals from 7 (0.01% of 79330) affected shaders:
Instrs: 7001 -> 6993 (-0.11%)
CodeSize: 35736 -> 35692 (-0.12%)
InvThroughput: 3232 -> 3229 (-0.09%)
Copies: 552 -> 549 (-0.54%)
PreSGPRs: 277 -> 273 (-1.44%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25477>
 2023-10-02 10:11:37 +00:00
Rhys Perry c3a894fb47 aco: disable zero offset optimization for strict WQM coords 
If we try to do this, we end up using {undef,coordx} as the coordinates
for an image_sample instruction, because we can't shrink the linear VGPR.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9767
Fixes: 859e059aa9 ("radv: use fix_derivs_in_divergent_cf")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25477>
 2023-10-02 10:11:37 +00:00
Georg Lehmann 305db1af11 nir: scalarize masked_swizzle_amd created from shuffle_xor 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9901
Fixes: 0ef87f148d ("nir/lower_subgroups: Don't do multiple lowerings at once")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25468>
 2023-10-02 09:01:18 +00:00
Tapani Pälli 524e8865ce iris/anv: move Wa_14018912822 as a drirc workaround 
This should be toggled on only for applications that hit the issue.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9886
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25424>
 2023-10-02 08:26:14 +00:00
Tapani Pälli ebe95fee21 iris: correct dst alpha blend factor in Wa_14018912822 
Fixes: 0e9a26372b ("iris: implement Wa_14018912822")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25424>
 2023-10-02 08:26:14 +00:00
Lionel Landwerlin 6ea2ea0bb0 anv: fix internal compute copy shader build 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9907
Fixes: 2cc5b3b1e0 ("anv: add a memcpy compute internal kernel")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25480>
 2023-10-02 07:39:01 +00:00
Iago Toral Quiroga 4afbf4ad31 v3d: get rid of shader_state pointer in v3d_key 
Having this pointer in the key is undesirable since it makes
copying keys difficult and error prone (as seen in previous
patches), also, it is only there for convenience and we don't
strictly need it (in fact the vulkan driver doesn't use it at
all), so let's just get rid of it so our v3d_key is fully
static.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25418>
 2023-10-02 06:35:07 +00:00
Iago Toral Quiroga 3fb9e27a3d v3d: fix RAM shader cache 
The RAM shader cache was using the v3d_key for hashes and
comparisons which is not correct. Particularly, this struct
has a void pointer where we store a reference to an uncompiled
shader with the NIR code, and that is of course not accounted
for when hashing and comparing keys, which can lead to bogus
cache hits.

This patch introduces a v3d_cache_key that has both the v3d key
and a sha1 of the uncompiled NIR. Now key hashing and comparison
is done on the static part of the v3d key (that is, excluding the
uncompiled shader pointer, which may be invalid in the cache if
the original shader was deleted) and taking the sha1 from the
uncompiled shader. This also makes sure the shader key we store
in the cache has a NULL shader_state pointer to make it more
clear that this field may not be used at all for caching purposes.

This fixes GPU hangs with some OpenCL tests (through Rusticl)
caused by incorrect RAM cache hits.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25418>
 2023-10-02 06:35:07 +00:00
Iago Toral Quiroga 8a4bd328cf v3d: use pre-computed shader sha1 for disk cache 
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25418>
 2023-10-02 06:35:06 +00:00