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128755 Commits

Author SHA1 Message Date
Mike Blumenkrantz
afb837523d zink: flush every 100k draws/computes 
this ensures more consistent throughput in e.g., drawoverhead

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10760>
 2021-05-13 10:31:59 +00:00
Timothy Arceri
5aabc91273 glsl: add missing support for explicit components in interface blocks 
From the ARB_enhanced_layouts spec:

   "As with input layout qualifiers, all shaders except compute shaders
   allow *location* layout qualifiers on output variable declarations,
   output block declarations, and output block member declarations.  Of
   these, variables and block members (but not blocks) additionally
   allow the *component* layout qualifier."

We previously had compile tests in piglit to make sure this was not a
compile error but no execution tests.

Fixes: d99a040bbf ("i965: enable ARB_enhanced_layouts for gen8+")

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10763>
 2021-05-13 08:07:53 +00:00
Timothy Arceri
1a71d6aa6e glsl: create validate_component_layout_for_type() helper 
This will be used in the following patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10763>
 2021-05-13 08:07:53 +00:00
Vinson Lee
57721591de nv50/ir: Add ConstantFolding constructor. 
Fix defect reported by Coverity Scan.

Uninitialized scalar field (UNINIT_CTOR)
member_not_init_in_gen_ctor: The compiler-generated constructor for this
class does not initialize foldCount.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10713>
 2021-05-13 05:56:13 +00:00
Vinson Lee
c892412111 nvc0/ir: Initialize CodeEmitterGK110 member progType in constructor. 
Fix defect reported by Coverity Scan.

Uninitialized scalar field (UNINIT_CTOR)
uninit_member: Non-static class member progType is not initialized in
this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10715>
 2021-05-12 22:18:30 -07:00
Chia-I Wu
77d959814c venus: get rid of #ifdef's in vn_CreateImage 
No real change after compiler optimizations.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10779>
 2021-05-12 22:37:05 +00:00
Lionel Landwerlin
f46aa1b9d7 intel/fs: use the final destination type for regioning restrictions 
This is most likely a rebase mistake :(

Fixes: f3e5cd813a ("intel/fs: Handle regioning restrictions of split FP/DP pipelines.")
Ref: aa53665fda ("intel/fs/copy_prop: check stride constraints with actual final type")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10764>
 2021-05-12 21:19:11 +00:00
Ezequiel Garcia
e1959f0f59 panfrost: Add GPU IDs for G52 1-Core-2EE (RK3568/RK3566) 
Rockchip SoCs RK3566 and RK3568 have a Gondul with
one shader core and two execution engines, with product ID 0x7402.

Quoting the datasheet:

Mali-G52 1-Core-2EE
* Support 1600Mpix/s fill rate when 800MHz clock frequency
* Support 38.4GLOPs when 800MHz clock frequency

To distinguish it from other variants of G52, we agreed
to call this "G52L", L is for Little.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10771>
 2021-05-12 20:45:44 +00:00
Alyssa Rosenzweig
01ef56a7e4 pan/mdg: Use smaller LD_UNIFORM instructions 
If we only read 8 bytes from a UBO, we need to use LD_UNIFORM.64 as
opposed to LD_UNIFORM.128. In addition to probably being faster, this
fixes a buffer overrun manifesting as MMU faults with source ID
0x500/0x600/0x700, visible in WebGL Aquarium.

This is essentially the same patch as 616394cf31 ("pan/mdg: Use
appropriate sizes for global loads/stores"), only this is for UBOs where
that was for SSBOs.

Before enabling PACKED_UNIFORMS, this bug was not visible since we could
guarantee the UBO size was a multiple of 16. We no longer have that
invariant, and in rare cases the last 8 bytes of the last 16-byte slot
of a mapped uniform buffer would overrun the BO and trigger a fault,
even if the result is unused.

Fixes: 24d7c413fe ("panfrost: Enable packed uniforms.")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10772>
 2021-05-12 20:04:21 +00:00
Alyssa Rosenzweig
df3edfc729 panfrost: Don't upload empty push uniform table 
Instead zero out the pointer in this case.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10772>
 2021-05-12 20:04:21 +00:00
Alyssa Rosenzweig
5c069ff512 panfrost: Clean up cases for emit_fbd 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10774>
 2021-05-12 19:46:59 +00:00
Alyssa Rosenzweig
dbdbbd29c9 panfrost: Remove spurious assignment 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10774>
 2021-05-12 19:46:59 +00:00
Alyssa Rosenzweig
55959da24a panfrost: Don't translate compare funcs 
Matches Gallium.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10774>
 2021-05-12 19:46:59 +00:00
Alyssa Rosenzweig
65a00b5199 panfrost: Hide CAP_INT16 behind is_deqp 
The GLSL precision lowering is still buggy (see !10729), no other driver
enables all the CAPs yet. I don't know enough GLSL IR to be the one to
fix this. In the mean time, this is a hotfix to expose the same set of
CAPs that radeonsi does.

By keeping it with is_deqp, we still get CI coverage of int16.

Closes: #4759
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10777>
 2021-05-12 19:31:34 +00:00
Rob Clark
6c530ebf40 freedreno/ir3: Don't force RTNE if rounding mode is undefined 
Forcing round-to-nearest-even results in loss of opportunities for
conversion folding, causing a regression in gfxbench gl_alu2.

Fixes: de195671bd ("ir3: nir_op_f2f16 should round to even")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10773>
 2021-05-12 19:05:27 +00:00
Leo Liu
052335a180 frontends/va: fix multi planes for external memeory type 
For the multi planes case, only the first plane is required with the
template buffer formats, and shouldn't fail for other planes.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10751>
 2021-05-12 18:55:35 +00:00
Rob Clark
57c8164389 gallium/u_threaded: Add call logging 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10753>
 2021-05-12 16:09:51 +00:00
Rob Clark
3b69cbe06c gallium/u_threaded: Add to_call() helper 
Add helper for casting the call, which when asserts are enabled will
sanity check the call size to detect corruption.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10753>
 2021-05-12 16:09:51 +00:00
Erik Faye-Lund
e8640fef90 ci: Uprev piglit to 3351e8952 ("max-texture-size: report merged results") 
This pulls in a fix for the max-texture-size test using piglit-runner,
among other things.

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10749>
 2021-05-12 15:47:35 +00:00
Marek Olšák
5818380f86 gallium/u_threaded: fix 32-bit breakage due to incorrect pointer arithmetic 
Fixes: 1233c90ab4 - gallium/u_threaded: rewrite slot layout to reduce wasted space
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4755
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4758
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10746>
 2021-05-12 15:25:46 +00:00
Daniel Schürmann
989e9867a6 aco: fix additional register requirements for spilling 
It could happen that VGPR spilling without SGPR spilling
calculated a negative spills_to_vgpr number and then
increasing the VGPR target demand above the limit.

Cc: mesa-stable

Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10756>
 2021-05-12 14:13:24 +00:00
Timur Kristóf
bb127c2130 radv: Use new NIR lowering of NGG GS when ACO is used. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
60ac5dda82 ac: Add NIR lowering for NGG GS. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
9732881729 radv: Use new NGG NIR lowering for VS/TES when ACO is used. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
3d589b8b46 ac: Add new NIR pass to lower NGG VS/TES. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
89a76ff786 aco: Implement new NGG specific NIR intrinsics. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
33e29f8f9b radv: Gather NGG info sooner. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
1630ec96d3 radv: Fill shader info earlier. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
75a002f809 aco: Split ngg_emit_sendmsg_gs_alloc_req from the wave0 check. 
This allows us to emit the gs_alloc_req independently of the
wave ID check, which is what the NIR lowering will need.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
ad8dd39bd3 aco: Fixup the NIR metadata after sanitize_cf_list. 
sanitize_cf_list can in fact invalidate the dominance metadata,
which we need to use eg. nir_unsigned_upper_bound.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
00fd087f0a aco: Allow workgroup barrier and shared scope for NGG shaders. 
NGG already needs to use workgroup barriers, but this commit allows
them to come from NIR as opposed to just emitting it in ACO
instruction selection.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
0d6b6c850f nir: Add AMD specific intrinsics for merged shaders and NGG. 
These intrinsics represent what the hardware can actually do.
Lowering our shaders to use these intrinsics will allow us to
deal with mapping the classic VS, TES, GS (and the future MS)
stages to the hardware capabilities using NIR, which makes our
backend compilers simpler.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
641707a807 nir: Allow load_primitive_id in VS in nir_divergence_analysis. 
The lowered NIR code of NGG VS shaders uses this intrinsic
when the VS has to export the primitive ID.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
e905e0938a nir: Support upper bound of unsigned bit size conversions. 
These allow us to generate slightly better code in some cases,
eg. multiplications in ACO.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Timur Kristóf
9a2ffe1abb nir: Support upper bound of subgroup_id/num_subgroups for non-compute. 
These intrinsics will be used when lowering NGG shaders, including
currently supported stages like VS, TES, GS and also by mesh shaders
in the future.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10740>
 2021-05-12 13:47:04 +00:00
Alyssa Rosenzweig
ac5ba2dfad panfrost: Implement framebuffer invalidation 
The strategy is lifted from Freedreno. The trick is to remove buffers
from the resolve set, rather than add buffers to a discard set (as you
would naively try). The latter is wrong -- draws after the
glInvalidateFramebuffer() still need to be respected.

glmark2 -btexture on-screen with sway on Mali T860 from 1393fps to
1998fps

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Closes: #2407
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6295>
 2021-05-12 12:47:53 +00:00
Alyssa Rosenzweig
c8161bf05d panfrost: Set discard based on the resolve set 
This is a bit simpler and will allow resolve to be disabled
independently.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6295>
 2021-05-12 12:47:53 +00:00
Alyssa Rosenzweig
bff8c7e611 panfrost: Track buffers needing resolve 
This is a subset of the buffers cleared or drawed.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6295>
 2021-05-12 12:47:53 +00:00
Marcin Ślusarz
2c3e2d69bd nir: handle float atomics in nir_lower_memory_model 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 2adb337256 ("nir,radv/aco: add and use pass to lower make available/visible barriers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10766>
 2021-05-12 11:09:07 +00:00
Marcin Ślusarz
27073b59bc nir: handle float atomics in nir_gather_info 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10766>
 2021-05-12 11:09:07 +00:00
Erik Faye-Lund
8166e41e1f translate: assert that nr_elements is in range 
This just ensures that we don't end up reading/writing outside of the
space reserved in the key. This would have made it easier to to track
down the issue in the previous commit faster.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10730>
 2021-05-12 11:26:54 +02:00
Erik Faye-Lund
100c4dbd9c translate: reserve more vertex-shader outputs 
It's not just position that's special here, we also need space for
other special vertex-shader outputs.

This fixes a crash with Zink on Lavapipe, because Zink always emits
psize to avoid some shader-keys. While this might not be ideal, it's not
illegal. So we need to handle it.

But it seems we're missing more, and this list is taken from
compute_vertex_info() in lp_state_derived.c.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10730>
 2021-05-12 11:26:54 +02:00
Erik Faye-Lund
790b9a5872 lavapipe: correct reported number of UBOs 
When emitting the state we add one to the UBO index, so we have to
subtract one from the number of UBOs that we support. This is still
fine, because Vulkan only requires 14 UBOs to be supported, and LLVMpipe
supports 16.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10731>
 2021-05-12 10:52:36 +02:00
Boris Brezillon
7db79fa677 panfrost: Flag indirect draw/dispatch shaders as internal 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10417>
 2021-05-12 07:03:51 +00:00
Boris Brezillon
ec2b46a1ce panfrost: Expose the DRAW_PARAMETERS cap on Bifrost 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10417>
 2021-05-12 07:03:51 +00:00
Boris Brezillon
a5ba2e2045 pan/bi: Add support for gl_DrawID 
We simply pass the drawid as a sysval.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10417>
 2021-05-12 07:03:51 +00:00
Boris Brezillon
7cc4c8c5e5 pan/bi: Add support for gl_{BaseVertex,BaseInstance} 
Extend the VERTEX_INSTANCE_OFFSETS sysval to pass
BaseVertex/BaseInstance information to the shader.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10417>
 2021-05-12 07:03:51 +00:00
Alyssa Rosenzweig
69d81edaf8 pan/bi: Add first_vertex to vertex ID 
Apparently r61 is zero based.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10417>
 2021-05-12 07:03:51 +00:00
Boris Brezillon
0e74598e36 panfrost: Split the indexed and !indexed indirect draw info structs 
Some fields are overlapping, so let's just split those structs to
avoid confusion.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10417>
 2021-05-12 07:03:51 +00:00
Gustavo Padovan
5d6608ef78 iris/ci: enable intel devices automatically in MR pipelines 
After a period of stabilization it is now time to move them
to be part of the MR pipelines. We will still watch the
behavior and look for any issue that arises.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10550>
 2021-05-12 08:21:38 +02:00