AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
206,760 Commits 1 Branch 0 Tags
a45143e04cb976d153e8a301036ded51b0e0a7ff
Commit Graph

191357 Commits

Author SHA1 Message Date
Jianxun Zhang a45143e04c anv: Don't choose compression modifier when aux is disabled 
When aux has to be disabled (ISL_SURF_USAGE_DISABLE_AUX_BIT)
for some reasons like VK_SHARING_MODE_CONCURRENT, we simply
cannot implicitly choose any modifier with compression.

Otherwise, we run into a situation that an image is created
with a modifier but without the aux support that modifier
requires. It will fail a CTS test once Xe2 modifiers are
enabled:

dEQP-VK.wsi.wayland.swapchain.private_data.image_sharing_mode

MESA: warning: ../src/intel/vulkan/anv_image.c:1198: image with
modifier unexpectedly has wrong aux usage (VK_ERROR_UNKNOWN)

GFX12.x (MTL) does not show this failure because only one queue
family is present. But they will face the same issue when aux is
disabled for any other reasons:

NotSupported (Only 1 queue families available for
VK_SHARING_MODE_CONCURRENT at vktWsiSwapchainTests.cpp:715)

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
 2025-06-12 04:07:12 +00:00
Jianxun Zhang 7c2f340d37 anv: Align size of compressed scanout buffers to 64KB on BMG (xe2) 
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
 2025-06-12 04:07:11 +00:00
Jianxun Zhang b7f7f1c74f anv: Treat imported compressed buffers as displayable (xe2) 
As a part of the effort to unify the displayable attribute
on dmabuf sharing across drivers, we set scanout flag on
imported bos on Xe2+.

Refer to the comment in the change.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
 2025-06-12 04:07:11 +00:00
Jianxun Zhang 0af794fe50 iris: Enable Xe2 modifier (xe2) 
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
 2025-06-12 04:07:11 +00:00
Jianxun Zhang b96d677c42 iris: Refactor function iris_flush_resource 
Setting the removed flag true is not needed.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Acked-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
 2025-06-12 04:07:11 +00:00
Jianxun Zhang f88e153635 iris: Update conditions when flushing resource (xe2) 
Update the conditions of reallocation for Xe2 modifiers and also
ensure the realloation to happen on all bos.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
 2025-06-12 04:07:11 +00:00
Jianxun Zhang 1149f1c5a1 iris: Choose PAT entry on imported buffers (xe2) 
Refer to the comment added into the change, buffers imported
with a Xe2 modifier supporting compression should get a
compression-enabled PAT entry.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
 2025-06-12 04:07:10 +00:00
Jianxun Zhang 665f5e8757 iris: Add new modifiers into code (xe2) 
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
 2025-06-12 04:07:10 +00:00
Jianxun Zhang 785d1c3b86 iris: Align size of compressed scanout buffers to 64KB on BMG (xe2) 
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
 2025-06-12 04:07:10 +00:00
Jianxun Zhang 2660b7c49d isl: Add Xe2 CCS modifiers (xe2) 
Narrow down the definition of two compression flags suggested by
Nanley Chery <nanley.g.chery@intel.com> so that we can address
the unified compression support of Xe2 modifiers and don't have
to set media compression flag thats result more update in the
stack.

Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34567>
 2025-06-12 04:07:10 +00:00
Christian Gmeiner f261370995 asahi/lib: Don't use deprecated NIR_PASS_V macro 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35479>
 2025-06-11 21:43:01 +00:00
Collabora's Gfx CI Team 350eccd032 Uprev Piglit to a0a27e528f643dfeb785350a1213bfff09681950 
https://gitlab.freedesktop.org/mesa/piglit/-/compare/685ea49b47ae52560975cfcdb0ea0d4d27fead16...a0a27e528f643dfeb785350a1213bfff09681950

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35303>
 2025-06-11 21:14:59 +00:00
Mike Blumenkrantz 2b39cd0722 util/box: make u_box_test_intersection_2d() consistent with other funcs 
cc: mesa-stable

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21738>
 2025-06-11 20:46:29 +00:00
Georg Lehmann ad80b554f4 spirv: use feq for OpIsInf 
This effectively reverts fcca6a83cd because feq was clarified to be ordered
when used with exact and without fast math flags.

It's common for HW to only have free abs for floating point instructions.

Foz-DB Navi21:
Totals from 63 (0.08% of 80065) affected shaders:
Instrs: 337027 -> 336667 (-0.11%); split: -0.12%, +0.02%
CodeSize: 1846752 -> 1845000 (-0.09%); split: -0.13%, +0.03%
Latency: 3401087 -> 3400633 (-0.01%); split: -0.04%, +0.03%
InvThroughput: 847299 -> 845939 (-0.16%); split: -0.19%, +0.03%
VClause: 7693 -> 7694 (+0.01%)
Copies: 45175 -> 45240 (+0.14%); split: -0.12%, +0.27%
PreSGPRs: 3555 -> 3553 (-0.06%)
PreVGPRs: 4565 -> 4564 (-0.02%)
VALU: 225473 -> 225245 (-0.10%); split: -0.13%, +0.03%
SALU: 44735 -> 44625 (-0.25%)

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35437>
 2025-06-11 18:34:21 +00:00
Faith Ekstrand 9c83e9f120 nvk: Drop nvk_buffer_address() 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35472>
 2025-06-11 18:09:38 +00:00
Rob Clark cd4f6caa0d vtn: Handle non-32b tex dests 
With cl_khr_fp16 we can get texture instructions w/ f16 dest.  Not all
drivers handle this, so convert to 32b dest and insert alu conversion to
the requested type.  Drivers that can handle f16 texture loads would
fold away the extra conversion with nir_opt_16bit_tex_image.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35470>
 2025-06-11 17:48:10 +00:00
Mel Henning d764e1c062 zink: Return NULL on vkCreateInstance failure 
Previously we were returning uninitialized data on the error path.

Fixes: 015eda4a41 ("zink: deduplicate VkDevice and VkInstance")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35471>
 2025-06-11 17:32:27 +00:00
Derek Foreman 95148a5dfd egl/dri/wayland: Fix memory leak in wayland buffer handling 
In 54c4a41e2d some of the wl_buffers are
destroyed without using the loader_wayland_buffer_destroy functions on
their wrappers, leaking the wrapper.

Fixes 54c4a41e2d

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35466>
 2025-06-11 17:09:47 +00:00
Aaron Ruby 36dd155e7a gfxstream: Prune the wait/signal semaphore lists on queue submissions 
For Linux guests, remove syncFd semaphores entirely, as they are waited
on/signaled using the guest-side syncFd operations, and coarse
queueWaits only.

Reviewed-by: Gurchetan Singh <gurchetansingh@google.com>
Reviewed-by: Marcin Radomski <dextero@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34751>
 2025-06-11 11:46:10 -04:00
Christoph Pillmayer f9ed719c6a panvk: Add tests for ls tracker behavior in cs_loop 
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35436>
 2025-06-11 15:19:50 +00:00
Christoph Pillmayer cdedd04640 panvk: Fix ls_tracker usage in cs_loop 
LOAD_MULTIPLE can be emitted inside of a loop body. We need to WAIT if
that loads targets a register for which a load was not already in-flight
at the start of the loop body.

Technically we only have to emit the wait if the dst reg of a new load
is actually used inside the loop, but that would require separate
tracking of source regs used in the loop and is probably not worth
the effort for now.

Fixes: f75569734e (panvk: Remove explicit LS waits)
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35436>
 2025-06-11 15:19:50 +00:00
Christoph Pillmayer a24abc3fbd panvk: Move cs_wait_slot(s) and cs_flush_loads/stores 
The following commit needs to flush loads from cs_loop_ functions.

Fixes: f75569734e (panvk: Remove explicit LS waits)
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35436>
 2025-06-11 15:19:50 +00:00
Hoe Hao Cheng a36e51af22 zink: remove fixup_driver_props 
No longer needed after the codegen improvements

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35389>
 2025-06-11 14:49:52 +00:00
Hoe Hao Cheng 4d1768aec5 zink/codegen: support double-loading dynamic properties arrays 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35389>
 2025-06-11 14:49:52 +00:00
Hoe Hao Cheng 4eb50771e4 zink/codegen: add indentation to the mako templates 
This regains us some much needed sanity

And it actually uncovered a bug in zink_instance.py:L306 (misplaced
%endif)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35389>
 2025-06-11 14:49:52 +00:00
Hoe Hao Cheng a5e114ce97 zink: apply EXT-suffixed functions to their unsuffixed counterpart 
...if they are promoted to core verbatim.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35389>
 2025-06-11 14:49:51 +00:00
Hoe Hao Cheng 66f0a99c73 zink: apply core functions to extension functions 
...if those core functions were promoted verbatim from the extension.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35389>
 2025-06-11 14:49:51 +00:00
Hoe Hao Cheng ef1ae1f24f zink: make zink_device_info look for KHR versions of promoted exts 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35389>
 2025-06-11 14:49:51 +00:00
Hoe Hao Cheng bbfeb6cd87 zink: fix win32 detection in zink_device_info 
str.find(substr) returns -1 if the substring's not in the string, and
bool(-1) returns True in Python, so the _WIN32 ifdef guard was actually
inserted everywhere.

Also, the win32 functions actually have "Win32" in their name, like
vkGetMemoryWin32HandleKHR

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35389>
 2025-06-11 14:49:50 +00:00
Marek Olšák 4dafd2e787 radeonsi: add a workaround for a DrawTransformFeedback issue on gfx11.5 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35344>
 2025-06-11 14:29:06 +00:00
Marek Olšák d991810833 radeonsi/ci: update gfx8 failures 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35344>
 2025-06-11 14:29:06 +00:00
Marek Olšák 56ed949e08 radeonsi: don't clamp the shadow comparison value for nir_texop_lod on gfx8-9 
It doesn't have the value. This fixes a crash on gfx8-9.

Cc: mesa-stable

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35344>
 2025-06-11 14:29:06 +00:00
Lionel Landwerlin 595889018a anv: implement VK_KHR_maintenance9 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35381>
 2025-06-11 14:09:56 +00:00
Lionel Landwerlin 884df891d7 anv: allow device creation with no queue 
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35381>
 2025-06-11 14:09:56 +00:00
Lionel Landwerlin 1d8382b88e brw: enable more lowering for bitfield manipulation at non 32bit sizes 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35381>
 2025-06-11 14:09:56 +00:00
Juan A. Suarez Romero d983280da9 vc4: free RA interference graph on failure 
This fixes a leak in the driver.

Backport-to: 25.1
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35464>
 2025-06-11 13:29:35 +00:00
Martin Krastev bacc0451bc svga/ci: vmware farm is back; restore piglit job to automatic 
Signed-off-by: Martin Krastev <martin.krastev@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35459>
 2025-06-11 13:11:44 +00:00
Pierre-Eric Pelloux-Prayer 7280e3b2a1 radeonsi/tests: update expected results 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35206>
 2025-06-11 12:11:28 +00:00
Pierre-Eric Pelloux-Prayer 3bcbd11a33 aco/isel: fix visit_tex handling of is_sparse 
For cases when less than 4 components are read, the original code
would compute an incorrect dmask. eg: with a single component + is_sparse,
the dmask was 0x13:
  - 0x 3 = coming from nir_def_components_read
  - 0x10 = the sparse bit
While it should have at 2 bits set (1 for the color/depth, 1 for tfe).

This caused problem when expand_vector() used the dmask to generate
the final results, because the value for the sparse component was
read from the wrong index.

So after the call to emit_mimg() dmask needs to be adjusted
because the components will be stored in order, so if mask is 0x11
the tfe value would be stored at invalid index=5 (while it should
be at index=1).

This fixes KHR-GL46.sparse_texture_clamp_tests.SparseTextureClampLookupResidency_texture_2d_depth_component16
and KHR-GL46.sparse_texture2_tests.SparseTexture2Lookup_texture_2d_depth_component16
with ACO.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35206>
 2025-06-11 12:11:28 +00:00
Pierre-Eric Pelloux-Prayer 4a84ebfcb1 ac/llvm: rework component trimming in visit_tex 
The referenced commit was a step in the right direction, but not
complete.

ac_build_image_opcode returns a vec<4> or a struct<vec<4>, int>
so we can simplify visit_tex. We just need to map these 4/5 values
to the expected layout from NIR.
eg: depth + TFE would produces "<d, x, x, x>, t" so it has to be
transformed into <d, t>.

nir_texop_fragment_mask_fetch_amd + sparse doesn't exist, so it's
another opportunity for simplification.

This is required to get KHR-GL46.sparse_texture2_tests.SparseTexture2Lookup_texture_2d_depth_component16
working properly.
The same test fails with ACO so it probably needs a change in the
same area.

Fixes: c0ef2aa7f8 ("DEPENDENCY: ac/llvm: fix sparse code handling")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35206>
 2025-06-11 12:11:28 +00:00
Pierre-Eric Pelloux-Prayer 1cc52dff05 radeonsi: allow sparse depth textures 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35206>
 2025-06-11 12:11:28 +00:00
Pierre-Eric Pelloux-Prayer 508bf2a490 radeonsi/tests: fix script handling of missing results 
When running radeonsi-run-tests.py with the -t option, it's possible that
some suite won't generate any result so don't fail in this case.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35206>
 2025-06-11 12:11:28 +00:00
Pierre-Eric Pelloux-Prayer b153188f25 amd/ci: remove references to tests that don't exist anymore 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35206>
 2025-06-11 12:11:27 +00:00
Pierre-Eric Pelloux-Prayer 3d8fe9b36d radeonsi: skip draws using invalid setup 
Draws running with the secure bit set needs to have their destination
surfaces created with tmz to get the correct result.
Instead of asserting this fact, let just skip the invalid draws
completely.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35206>
 2025-06-11 12:11:27 +00:00
Pierre-Eric Pelloux-Prayer 0e9ba3031e radeonsi: allow msaa sparse textures on gfx10+ 
The hardware doesn't support the prt layouts, but we can use normal
layouts and ac_surface_addr_from_coord to determince which pages
need to be committed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35206>
 2025-06-11 12:11:27 +00:00
Pierre-Eric Pelloux-Prayer ee6d3a593e winsys/radeon: add surface_offset_from_coord 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35206>
 2025-06-11 12:11:27 +00:00
Juan A. Suarez Romero d6614099a0 vc4,v3d: update expected results 
Add new failures/flakes.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35462>
 2025-06-11 11:55:54 +00:00
Corentin Noël 1dfe97cc0b llvmpipe: Make sure to not divide by zero on debug output 
Check that lp->nr_fs_variants is not zero before dividing by it as done in a few
lines above.

CID: 1417662 Division or modulo by zero
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35091>
 2025-06-11 11:03:34 +00:00
Corentin Noël d4d37ead82 llvmpipe: Make sure to not divide by zero on debug output 
Check that lp->nr_cs_variants is not zero before dividing by it as done in a few
lines above.

CID: 1531786 Division or modulo by zero
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35091>
 2025-06-11 11:03:34 +00:00
Corentin Noël 383684596c llvmpipe: Check for negative size before mapping the memory 
CID: 1596479 Argument cannot be negative
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35091>
 2025-06-11 11:03:34 +00:00