Commit Graph

170123 Commits

Author SHA1 Message Date
Constantine Shablia 96504d51a2 panvk: advertise bufferDeviceAddress
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27209>
2024-01-25 09:19:50 +00:00
Constantine Shablia 2d614b5550 panvk: implement vkGetBufferDeviceAddress
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27209>
2024-01-25 09:19:50 +00:00
Kenneth Graunke 2e38024fd8 intel: Use hardware generated compute shader local invocation IDs
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27167>
2024-01-25 08:43:04 +00:00
Kenneth Graunke 5e7f4ff97f intel: Add driver support for hardware generated local invocation IDs
This adds a few new fields in the brw_cs_prog_data struct and then
uses them to fill in the relevant COMPUTE_WALKER fields.

Although the Tile Layout field theoretically has different settings for
32/64/128bpe, it appears that the recommended programming is to always
pick either TileY 32bpe or Linear.  It's not very practical to look at
the surface formats involved, anyway.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27167>
2024-01-25 08:43:04 +00:00
Kenneth Graunke 10ed4f1cab intel/nir: Pass devinfo and prog_data to brw_nir_lower_cs_intrinsics
We'll want to check for Alchemist and set various prog_data fields
in the next patch, in order to enable some optimizations.  Passing
NULL for prog_data will remain valid and continue working as before.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27167>
2024-01-25 08:43:04 +00:00
Kenneth Graunke f85ad92dae iris: Implement query_memory_info() on discrete cards
This has been stubbed since 2019, but wasn't advertised or implemented.

Neither kernel offers us any interface for tracking evictions, but we
can at least report the size of various heaps.

Fixes various SPECviewperf subtests on Alchemist.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27168>
2024-01-24 23:37:30 +00:00
Kenneth Graunke f7ef356a74 intel/dev: Fix typo (ajust -> adjust)
Fixes: b571ae6e7a ("intel: Make memory heaps consistent between KMDs")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27168>
2024-01-24 23:37:30 +00:00
Kenneth Graunke 5ccb9f4632 iris: Don't return timestamps modulo 36-bits
Our actual timestamp register from the hardware is 36-bits these days.
Depending on the clock base, a few of the low bits may be discarded.
We scale by 52.08 or so (see intel_device_info_timebase_scale()) in
order to convert clock ticks to nanoseconds.  This value could take
~43-44 bits to represent.  When our timestamp register overflows, the
reported value would overflow at some value which isn't a power-of-two.

For some reason, when we implemented ARB_timer_query for i965 in 2012,
we thought applications would use GL_QUERY_COUNTER_BITS to detect and
handle overflow, expecting our timer queries to overflow at a power-of-
two value.  We tried to hack around this by reporting a 36-bit counter,
for what was then a 32-bit(?) timestamp register, with a timebase scale
of 80(?)...and reported the nanoseconds modulo 2^36, with some
handwaving about wrap around times being close enough.

I don't think this is what anyone wants.  All other Gallium drivers
(except maybe zink) report 64 here, as does the Intel Windows driver.

The ARB_timer_query spec defines it as:

   "If <pname> is QUERY_COUNTER_BITS, the implementation-dependent
    number of bits used to hold the query result for <target> will be
    placed in <params>.  The number of query counter bits may be zero,
    in which case the counter contains no useful information."

and it also mentions about overflow:

   "If the elapsed time overflows the number of bits, <n>, available to
    hold elapsed time, its value becomes undefined.  It is recommended,
    but not required, that implementations handle this overflow case by
    saturating at 2^n - 1."

There's nothing about roll-over happening at power-of-two times, just
that the value returned has to fit in that many bits, and if the value
were to exceed that, it's undefined, optionally saturated to the maximum
representable value.

This patch makes us report 64 like other drivers, and stop taking the
modulus.  Technically, our roll-over will happen before we reach the
number of query counter bits, which may or may not be valid.  But this
does let us report longer times, and should be more desirable behavior.

Tested-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26058>
2024-01-24 23:13:15 +00:00
Jesse Natalie 9b495ee8a9 dzn: Disable depth/stencil for partial binding from dynamic rendering
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27224>
2024-01-24 22:32:59 +00:00
Jesse Natalie f4c6d9d9a9 dzn: Handle VkBindImageMemorySwapchainInfoKHR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27224>
2024-01-24 22:32:59 +00:00
Jesse Natalie df684ee653 dzn: Fix enhanced barrier layout for depth blits
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27224>
2024-01-24 22:32:59 +00:00
Jesse Natalie fcd56e31f7 dzn: Implement maintenance3 VariableDescriptorCountLayoutSupport
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27224>
2024-01-24 22:32:59 +00:00
Jesse Natalie beb82c836d microsoft/compiler: Add feature flags for new comparison sampling ops
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27200>
2024-01-24 21:38:49 +00:00
José Roberto de Souza d5ec2fa52f anv: Fix calculation of syncs required in Xe KMD
num_syncs was being incremented by one if 'utrace_submit != NULL' but
a sync was only being set if also
'util_dynarray_num_elements(&utrace_submit->batch_bos) == 0'.

This mismatch could cause application to abort due to
'assert(count == num_syncs)'.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27244>
2024-01-24 20:48:39 +00:00
Dave Airlie 38e92556a0 gallivm: passing fp16_split_fp64 to fp16 lowering.
This causes lavapipe to use the split code and fixes accuracy
for CTS.

Fixes dEQP-VK.glsl.builtin.precision_fconvert.f64_to_f16*

Cc: mesa-stable
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27228>
2024-01-24 20:05:57 +00:00
Ian Romanick c2a25cf75c intel/fs: Fix shift counts for 8- and 16-bit types
With regards to implicit masking of the shift counts for 8- and 16-bit
types, the PRMs are incorrect. They falsely state that on Gen9+ only the
low bits of src1 matching the size of src0 (e.g., 4-bits for W or UW
src0) are used. The Bspec (backed by data from experimentation) state
that 0x3f is used for Q and UQ types, and 0x1f is used for **all** other
types.

To match the behavior expected for the NIR opcodes, explicit masks for
8- and 16-bit types must be added.

This fixes (the updated version, see crucible!138) of
func.shader.shift.int16_t on all Intel platforms. According to Karol,
this also fixes "integer_ops integer_rotate" tests in OpenCL CTS.

No shader-db or fossil-db changes on any Intel platform.

Tested-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23001>
2024-01-24 19:41:35 +00:00
Faith Ekstrand b2824dd38d nvk: Set maxInlineUniformTotalSize
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27242>
2024-01-24 19:26:04 +00:00
Faith Ekstrand 58e916b3b7 nvk: Don't exnore ExternalImageFormatInfo
Fixes: 702326d013 ("nvk: Add external memory queries")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27242>
2024-01-24 19:26:04 +00:00
Karol Herbst c7ffbd8759 nak: fix clippy::single_match warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst cce0a42dcd nak: fix clippy::clone_on_copy warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst e7a059794e nak: fix clippy::manual_while_let_some warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst 36cb48d083 nak: fix clippy::unwrap_or_default warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst fb53146b44 nak: fix clippy::redundant_closure warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst 06ff342ee1 nak: fix clippy::needless_return warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst 4b039abd7b nak: fix clippy::match_like_matches_macro warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst 4d414cb61a nak: fix clippy::while_let_loop warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst 1effb5262a nak: fix clippy::needless_borrow warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst 3d4bd73fa3 nak: fix clippy::needless_lifetimes warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst 00a6e2ae4d nak: fix clippy::useless_conversion warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst ec7b32d920 nak: fix clippy::mem_replace_with_default warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst cab414669f nak: fix clippy::extra_unused_lifetimes warnings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Karol Herbst 7c9734b6dc nak/meson: specify rust flags globally and allow some clippy lints
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27234>
2024-01-24 17:46:29 +00:00
Rhys Perry 6dc182b6b2 aco: fix labelling of s_not with constant
Fixes RADV compilation of a Cyberpunk 2077 RT pipeline with
PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: dfaa3c0af6 ("aco: Flip s_cbranch / s_cselect to optimize out an s_not if possible.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27194>
2024-01-24 17:25:15 +00:00
Georg Lehmann 4c74077b62 aco: implement rotate
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27118>
2024-01-24 16:38:40 +00:00
Georg Lehmann b90ec971d7 aco/gfx11: resolve VcmpxPermlaneHazard for v_permlane64
The GFX11 ISA docs description of this hazard says it's about v_permlane in
general, not just v_permlane(x)16.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27118>
2024-01-24 16:38:40 +00:00
Georg Lehmann 19876386e2 aco/gfx11: use v_nop to resolve VcmpxPermlaneHazard
The GFX11 ISA doc explicitly recommends using v_nop in
7.2.8. PERMLANE Specific Rules.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27118>
2024-01-24 16:38:40 +00:00
Georg Lehmann a626f765b5 aco: support v_permlane64_b32
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27118>
2024-01-24 16:38:40 +00:00
Georg Lehmann c67d4a75ba aco: validate v_permlane opsel correctly
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27118>
2024-01-24 16:38:40 +00:00
Georg Lehmann bc57f14c2d aco: fix printing dpp8
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27118>
2024-01-24 16:38:39 +00:00
Rohan Garg c69650a95e isl,blorp,anv: introduce ISL_TILING_64_XE2 for Xe2+ platforms
Xe2+ changed the msaa mapping for 2D/3D Tile64 surfaces, introduce a
Xe2+ specific enum to handle this change.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27113>
2024-01-24 17:01:48 +01:00
Samuel Pitoiset db4673ee72 radv: add a per-stage key field for mesh shaders with a task shader
This is to match VK_SHADER_CREATE_NO_TASK_SHADER_BIT_EXT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27176>
2024-01-24 14:52:34 +00:00
Samuel Pitoiset 1e1a6d8e26 radv: remove unused parameter to gather_shader_info_mesh()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27176>
2024-01-24 14:52:34 +00:00
Mike Blumenkrantz df45cbddb5 zink: set more dynamic states when using shader objects
fixes #10457

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27146>
2024-01-24 14:17:27 +00:00
Karol Herbst eca4f0f632 rusticl/kernel: check that local size on dispatch doesn't exceed limits
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27232>
2024-01-24 13:19:00 +00:00
Karol Herbst 2a0c15d5eb rust/spirv: fix clippy lint on unneeded late initialization
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27232>
2024-01-24 13:19:00 +00:00
Karol Herbst 4dd404dd2e rusticl/meson: use rust_abi instead of rust_crate_type
`rust_crate_type` was deprecated in meson-1.3

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27232>
2024-01-24 13:19:00 +00:00
Friedrich Vock 9f22b95956 nir: Handle casts in nir_opt_copy_prop_vars
Cc: mesa-stable

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27197>
2024-01-24 12:39:48 +00:00
Friedrich Vock 6c845ed548 nir: Make is_trivial_deref_cast public
Cc: mesa-stable

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27197>
2024-01-24 12:39:48 +00:00
Boris Brezillon f6f7715c58 panfrost: Clamp the render area to the damage region
The render area clamping was lost during the transition to the FB
helpers. Restore the original logic so we can benefit from
EGL_KHR_partial_update on v4, and on v5 when only one damage
rectangle is passed.

Fixes: ff3eada7eb ("panfrost: Use the generic preload and FB helpers in the gallium driver")
Reported-by: Sjoerd Simons <sjoerd.simons@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Sjoerd Simons <sjoerd.simons@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27215>
2024-01-24 11:58:50 +00:00
Tomeu Vizoso 60c2bcb8af etnaviv: Use TP cores to accelerate tensor transformations
Vivante NPUs can contain systolic arrays that can be used to perform
several kinds of tensor transformations.

Use these to offload the CPU.

Acked-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25714>
2024-01-24 10:02:11 +00:00